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    Readout for simple and precise analog acoustic impact initialization
    (2021-12-01)
    Sotner, Roman
    ;
    Polak, Ladislav
    ;
    Jerabek, Jan
    ;
    Lahiri, Abhirup
    ;
    Jaikla, Winai
    An economic concept of acoustic shock wave sensing readout system for simple computer processing is introduced in this work. Its application can be found in precise initialization of the stopwatch from the starter sound, handclap or gun in competitive sport races but also in many other places. The proposed device consists of several low-cost commercially available components and it is powered by a 9 V battery. The proposed device reliably reacts on incoming acoustic shock wave by generation of explicit impulse having controllable duration. It significantly overcomes basic implementations using only a microphone and amplifier (generating parasitic burst instead of defined and distinct impulse) or systems allowing a limited number of adjustable features (gain and/or threshold of the comparator—our concept offers the adjustment of gain, cut-off frequency, threshold level and time duration of active state). In comparison with standard methods, the proposed approach simplifies and makes sensing device less expensive and universal for any powder-based starting gun (without necessity to adapt starting gun). The proposed device, among others, has the following features: impulse duration can be controlled from hundreds of μs up to 2.3 s, the gain range of linear part of processing from 6 to 40 dB and open-collector output compatible with 5 V TTL or 3.3 V CMOS logic. The initialization has been tested in the range from tens of centimeters up to four meters. In order to highlight the important spectral components, the spectral character of the signal can be optimally reduced by a low-pass filter. The quiescent power consumption of the designed simple analog circuit reaches 90 mW. Several use cases, response of the designed system on gunshot signature, talking, hand-clapping and hit on the sensing microphone, are studied and compared to each other. Simulation and experimental results confirm functionality of the realized system.
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    Ultra low-voltage low-power current conveyor transconductance amplifier
    (2015-07-01)
    Khateb, Fabian
    ;
    Kumngern, Montree
    ;
    Dabbous, Salma Bay Abo
    ;
    Kulej, Tomasz
    ;
    Lahiri, Abhirup
    This paper presents ultra low-voltage (LV) low-power (LP) CMOS structure for Current Conveyor Transconductance Amplifier (CCTA). The proposed structure is performed using recently presented technique named bulk-driven quasi-floating gate (BD-QFG) enabling the CCTA to operate at low supply voltage ±0.3 V with low-power consumption in the micro range of 34 μW. Moreover, the proposed circuit provides adjustable transconductance via external grounded resistor. In addition to the topology simplicity, the proposed circuit offers high linearity and extended range of transconductance controlling. Two new figure of merit (FOM) are used to characterize the performance of the design and prove its effectiveness as compared to other. Eventually, to verify the functionality of the circuit, two current mode multi-function biquad filters are included as examples of application. The simulations are performed in PSPICE environment using the 0.18 μm CMOS n-well process from TSMC.
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    Digitally programmable low-voltage highly linear transconductor based on promising CMOS structure of differential difference current conveyor
    (2015-07-01)
    Khateb, Fabian
    ;
    Lahiri, Abhirup
    ;
    Psychalinos, Costas
    ;
    Kumngern, Montree
    ;
    Kulej, Tomasz
    A digitally programmable low-voltage highly linear transconductor (G<inf>m</inf> stage) realization, using a promising CMOS structure of differential difference current conveyor (DDCC) and a R-2R ladder network, is introduced in this paper. Thanks to the efficiency of the DDCC CMOS structure, the transconductor exhibits excellent linearity in a wide range of the input voltage and its transconductance value is digitally programmable by the use of a R-2R ladder network. The CMOS structure of the DDCC is based on the latest bulk-driven quasi-floating-gate technique and hence it is capable to work under low-voltage power supply of ±0.5 V and consumes 36 μW of power. The differential input MOS transistor pairs of the proposed structure are simultaneously driven from bulk and quasi-floating-gate terminals; this leads to an increased value of the voltage gain, bandwidth, and input common-mode voltage range. The last one is the main benefit of this structure in comparison to already existing solutions. The proposed CMOS structure of the DDCC was designed and fabricated using 0.35 μm CMOS AMIS process with total chip area 213 μm × 266 μm. As an application example, a digitally programmable universal filter using three DDCCs and two grounded capacitors is presented.
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    Conception of simulating grounded negative inductor and implementation using operational transconductance amplifiers
    (2013-12-31)
    Kwawsibsam, Adisorn
    ;
    Lahiri, Abhirup
    ;
    Jaikla, Winai
    This paper presents a novel realization of a grounded negative inductor simulator (NIS). The conception of creating grounded NIS is discussed and then a possible circuit realization using operational transconductance amplifier (OTA) is provided. The proposed circuit realization employs only two OTAs, one voltage summing circuit and three capacitors. PSPICE simulations have validated the workability of the proposed NIS in the operating frequency of 10kHz to 10MHz. © 2013 IEEE.
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    First CFOA-based explicit-current-output quadrature sinusoidal oscillators using grounded capacitors
    (2013-02-01)
    Lahiri, Abhirup
    ;
    Jaikla, Winai
    ;
    Siripruchyanun, Montree
    To date, no current-feedback operational amplifier (CFOA)-based sinusoidal oscillator has been reported which provides all the following features simultaneously: (i) current-mode quadrature sinusoidal oscillator providing two explicit-current-outputs (ECOs) from high output impedance terminals, (ii) employing no more than three CFOA ICs and six passive components, which include two grounded capacitors, (iii) offers independent tuning of the condition of oscillation (CO) via a resistor and (iv) provides tunability of the ratio of amplitudes of the generated quadrature ECOs via a separate resistor. To the best of authors' knowledge, this article reports first CFOA-based QOs in current-mode (i.e. providing two ECO signals). Experimental results using AD844 CFOA ICs from Analog Devices have been included to verify the workability of the proposed oscillator circuits. An example automatic gain control (AGC) loop to regulate the oscillation amplitude and control the THD has also been used and verified using SPICE simulations using the AD844 macro-model. © 2013 Copyright Taylor and Francis Group, LLC.