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Minimal Realization Plus Current Output CC-based Biquad Circuit
(2024-06-01)
Wisetphanichkij, Sompong
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Angkeaw, Krit
;
Sra-Ium, Napat
This paper presents a minimal design of a biquad circuit using only one plus current output type-II current conveyor (CCII), one differential voltage current conveyor (DVCC) and grounded passive components. The circuit enables the implementation of all 5 basic filter types: low-pass (LP), band-pass (BP), high-pass (HP), band-stop (BS) and all-pass (AP) by selecting and adding input and output currents with no component matching constraints. Moreover, the circuit parameters ω<inf>0</inf> and Q can be set simply by adjusting the circuit components. The proposed biquad circuit performance has very low sensitivity to circuit components due to its simple structure and a small number of devices (2 active and 4 grounded passive components). This allows the circuit to work at high frequencies. Non-ideal and parasitic effects are investigated and discussed. The performance of the proposed topology was evaluated through PSPICE simulator using the 0.18 μm CMOS technology from the Taiwan Semiconductor Manufacturing Company (TSMC).
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Minimal Realization Plus Current Output CC-based Biquad Circuit
(2023-01-01)
Wisetphanichkij, Sompong
;
Angkeaw, Krit
;
Sra-Ium, Napat
This paper presents a minimal design of biquad circuit using only one plus current output type-II current conveyor (CCII), one differential voltage current conveyor (DVCC) and grounded passive components. The circuit enables all 5 basic filter types, low-pass (LP), band-pass (BP), high-pass (HP), band-stop (BS) and all-pass (AP) implementation by the selection and addition of the input and output currents with no component matching constraints. Moreover, the circuit parameters $\omega$0 and Q can be set simply by adjusting the circuit components. The proposed biquad circuit performance has very low sensitivity to circuit components due to its simple structure and small number of devices (2 active and 4 grounded passive components). This allows the circuit to work at high frequencies. The performance of the proposed topology was evaluated through PSPICE simulator using the 0. 1S$\mu$m CMOS technology from the Taiwan Semiconductor Manufacturing Company (TSMC).
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Low-Cost Linearity Range Enhancement for Linear Variable Differential Transformer
(2022-02-15)
Prommee, Pipat
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Angkeaw, Krit
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Karawanich, Khunanon
This research proposes a low-cost and low-complexity technique to enhance the linearity range of linear variable differential transformer (LVDT) using logarithmic approximation and summing/subtracting operation. The proposed technique utilizes the feedforward approach and thus encounters no divide-by-zero behavior from inverse functions. The nonlinearity of LVDT can be counteracted by simply manipulating the parameters of the canceller circuit. Besides, the proposed technique can be applied to various LVDT nonlinearity types. The proposed linear enhancing circuit consists of operational amplifiers and a small number of passive elements. The nonlinearity cancellation could be further enhanced using a temperature-compensation circuit. Simulations were carried out using two different LVDT nonlinearity types: LVDT#1 and #2. The simulation results showed that the linearity enhancing circuit effectively enhances the LVDT linearity range, with the linearity errors of 0.51% and 1.83%, respectively. To validate, experiments were undertaken with the identical LVDT nonlinearity types using a circuit prototype, and the measured linearity errors are around 2.5% and 5.5%, respectively. The simulation and experimental results are agreeable with the theory, indicating that the proposed technique enhances the linearity range.
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Design and implementation of FPAA based LQR controller for magnetic levitation control system
(2019-07-01)
Angkeaw, Krit
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Pongyart, Witthawas
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Prommee, Pipat
Analog circuits were once necessary in many fields of technology, including control systems. Analog circuits were used to build many types of controller, but in controller design, synthesis of analog circuits were difficult. Because of its difficulty, most analog controllers have been replaced by digital controllers. Currently, the field programmable analog arrays (FPAA) which is a high level analog circuit, switched capacitor are widely used. Effective controller design and synthesis of analog circuits can be achieved easily using the FPAA. Therefore, the FPAA is applied to this project to design and synthesize an enhanced controller. An optimal controller, LQR as an example requires precise controller gain to obtain the highest performance which cannot be obtained using normal analog circuits. Moreover, using the FPAA can overcome performance degradation due to discretization in the synthesis of digital controllers. The simulation results confirm the advantages of a FPAA controller.
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High performance electronically tunable log-domain current-mode PID controller
(2018-02-01)
Prommee, Pipat
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Angkeaw, Krit
This research proposes a log-domain P (proportional) I (integral) D (derivative) controller whereby the bias currents are arbitrarily applied to the P, I and D components for independent or simultaneous electronic tuning and the subsequent improved response. In the study, the initial P, I and D circuits were individually realized using 17, 13 and 21 bipolar transistors, and the final PID controller required 62 bipolar transistors including the biasing circuits and a multiple-output current buffer. The proposed PID controller was operational on a dual power supply of ±1.5 V, with the wide-range tunability up to three decades without the circuit topology alteration. Additionally, simulations were carried out with the individual P, I, D circuits and PID controller to verify the performance (i.e. tunability and the response time) and the simulation results compared with the existing PID schemes. Importantly, the simulation results of the PID controller are in good agreement with the theoretical PID functions.
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Log-domain high-order low-pass and band-pass filters
(2017-09-01)
Prommee, Pipat
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Thongdit, Preecha
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Angkeaw, Krit
Continuous time current-mode high-order low-pass and band-pass filters based on the log-domain concept are presented in this paper. The passive RLC ladder networks are used as the prototype to achieve the proposed filter by simulating the RLC network synthesis method. The achieved filters have inherited the good sensitivity performance from the RLC passive prototype. Fifth-order RLC ladder low-pass filter and sixth-order RLC ladder band-pass filter are used as prototypes and the signal flow graph (SFG) technique is used for the synthesis. The SFG can identify group of integrators and several signal paths. Log-domain lossy and lossless integrators based on BJT technology are deployed to achieve the integrators for realization of proposed filters. The simulations were carried out and the results exhibited several features which are in agreement with the RLC prototype. The frequency response of filters along 100 kHz to 10 MHz can be electronically tuned through 5–500 µA of bias currents. The THD lower than 1% of LP and BP filters were measured at 10 MHz input. The multi-tone tested was included in the paper for verifying the performance of proposed LP and BP filters. The intermodulation distortions around −50 dB and −60 dB were also investigated for the proposed LP and BP filters.
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Tunable PID controller based on log-domain circuits
(2015-10-09)
Angkeaw, Krit
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Prommee, Tanakrit
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Prommee, Pipat
Current-mode proportional plus integral plus derivative (PID) controller based on log-domain concept is presented in this paper. The parameters of P, I, and D blocks can be independently controlled through bias currents. Only grounded capacitors are employed as a passive element for achieving the time-constant of I and D controllers. In each block of I and D controllers are easily constructed by using 10 bipolar transistors and a grounded capacitor except P controller uses only 4 bipolar transistors without any resistors. Thus, it is suitable for integrated circuits realization. Single power supply voltage 2.5V is used. The characteristics of PID are simulated is by SPICE. The demonstrated results are in good agreement with the theoretical expectations.
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Log-domain quadrature sinusoidal oscillator based on lossless integrator and all-pass filter
(2011-12-01)
Prommee, Pipat
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Somdunyakanok, Montri
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Angkeaw, Krit
A log-domain current-mode quadrature sinusoidal oscillator based on all-pass filter and lossless integrator is presented. The oscillator is realized by a first-order differential equation for obtaining all pass filter and lossless integrator. The proposed oscillator can be electronically tuned by adjusting bias currents. The proposed oscillator contains 18 NPN transistors, 2 grounded capacitors and 11 bias currents for achieving low-power and fast response. A validated BJT model is used in SPICE simulation operated from a single power supply as low as 2.5V. The oscillation frequency is controlled over four decades of frequency. The total harmonic distortion of signal output is obtained around 0.55%. The oscillation frequency can be operated more than 100MHz which enables fully integrated in telecommunication systems and suitable for high-frequency applications. SPICE simulation results are included. © 2011 IEEE.
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Floating-capacitance multiplier based on CCDDCCs and its application
(2011-12-01)
Somdunyakanok, Montri
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Angkeaw, Krit
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Prommee, Pipat
This paper proposes a new floating capacitance multiplier using three Current Control Differential Difference Current Conveyors (CCDDCCs) with CMOS technology and one grounded capacitor. The circuit can be electronically tuned through bias currents of CCDDCC without external resistor connections and temperature effects do not affected to the capacitance characteristic. The realization is suitable for further integration. The third-order elliptic LPF is included as an application. The simulations results of proposed capacitance multiplier and its applications are carried out by PSpice that agrees well with the theoretical expectations. © 2011 IEEE.
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Log-domain current-mode third-order sinusoidal oscillator
(2011-10-13)
Prommee, Pipat
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Angkeaw, Krit
This paper describes the design of the third-order sinusoidal oscillator based on log-domain filtering concept. The circuit consists of two inverting lossy integrators and one inverting lossless integrator. The circuit employs only NPN-transistors. This proposed circuit can be instantaneously controlled over a very wide frequency range by adjusting bias currents for oscillation frequency which are indicated proposed circuit suitability in high-frequency applications. The oscillation condition and frequency of oscillation can be tuned by bias current. Sinusoidal frequency output can be obtained up to 100MHz with low THD and low number of transistors. Characteristics of this circuit are simulated using PSpice and they are found in agreement with the theory. © 2011 IEEE.

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