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Author: search.filters.author.Chaikla, AmphawanSubject: search.filters.subject.Algorithmic ADC

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    OTA-based gray-code algorithmic ADC
    (2006-12-01)
    Chaikla, Amphawan
    ;
    Arayawat, Somjai
    ;
    Riewruja, Vanchai
    This paper presents a Gray-code algorithmic analog-to-digital converter (ADC). The proposed circuit comprises of OTAs, diodes, resistors, and voltage comparator to synthesize a triangular-like DC transfer characteristic and a digital output for an one-bit cell ADC. The design structure is simple and flexible. An N-bit resolution can be implemented by cascading the N proposed one-bit cells. Experimental results verifying the circuit performances are agreed with the theoretical values. © 2006 ICASE.
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    A low-voltage algorithmic ADC based on gray coding
    (2004-12-27)
    Arayawat, Somjai
    ;
    Chaikla, Amphawan
    ;
    Riewruja, Vanchai
    ;
    Julsereewong, Prasit
    ;
    Trisuwannawat, Thanit
    This paper presents an algorithmic analog-to-digital converter (ADC), which is based on gray coding. The realization method makes use of the De Morgan's law-based two-input minimum circuit, which performs a low-distortion in the transfer characteristic. The proposed ADC with the low supply voltage is simple, small in size and suitable for implementing a high-resolution ADC. The performances of the proposed circuit were studied using the PSPICE analog simulation program. The simulation results verified the circuit performances are agreed with the expected values.
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    A low-voltage algorithmic ADC based on gray coding
    (2004-11-17)
    Arayawat, Somjai
    ;
    Chaikla, Amphawan
    ;
    Riewruja, Vanchai
    ;
    Julsereewong, Prasit
    ;
    Trisuwannawat, Thanit
    This paper presents an algorithmic analog-to-digital converter (ADC), which is based on gray coding. The realization method makes use of the De Morgan's law-based two-input minimum circuit, which performs a low-distortion in the transfer characteristic. The proposed ADC with the low supply voltage is simple, small in size and suitable for implementing a high-resolution ADC. The performances of the proposed circuit were studied using the PSPICE analog simulation program. The simulation results verified the circuit performances are agreed with the expected values.