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Item type:Publication, A single phase 9-level inverter controlling based on Phase Lock Loop technique(2012-12-01) ;Tipsuwanporn, V. ;Charean, A. ;Numsomran, A.Phipek, K.In this paper is presented the multilevel inverter which is controlled by Phase Lock Loop (PLL) controller in close-loop system. The multilevel inverter was multiplied voltage levels at output. The inner PLL controller was controlled by PI control in order to firing angle of PWM signal. This control scheme is estimated phase and frequency in DQ-transform of PLL controller on time domain. The PLL controllers were locking constant the frequency and voltage of inverter through the signal estimated in DQ-dimension. The proposed methods determine high-precision and accuracy of switching frequency in PLL characteristic based on time domain. Moreover, in this paper represented the 2<sup>nd</sup> order phase lock loop (PLL) analysis methodology. The 2<sup>nd</sup> order phase lock loop demonstrated in transfer function form that is measured and analysis the signal in time domain. The close-loop control was analyzed the fast response and stability in frequency domain which is obviously behavior of Phase Lock Loop (PLL). © 2012 ICROS. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Quick torque controlled SPIM using PID controller based on PLL technique(2000-01-01) ;Tipsuwanporn, V. ;Charean, A. ;Piyarat, W. ;Kittisiam, T.Thepsatorn, P.This paper proposes the PERM technique by using the phase locked loop (PLL) and binary rate multiplier (BRM) techniques combined together to control the speed of a single-phase induction motor (SPIM). The system simulation is based on utilizing a discrete signal and the root locus technique to analyze the stability of the system before design. It is an easy method to determine the result response of the system. The PERM can adjust the circle criterion in the digital loop by considering a K ratio value between 0.179 to 1.85. This PERM technique can also control response signals back to steady state in less than 1.7 second during variable load or no load.
