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Tablet counting machine base on image processing
(2012-12-01)
Phromlikhit, Chanchai
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Cheevasuvit, Fusak
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Yimman, Surapan
This paper proposes Tablet counter machine base on image processing. A digital webcam creates an image of drug being dispensed. This image is displayed in standard MGB model. The original image will change to grayscale image. Then grayscale image will filtered for noise using a median filter and then using threshold we obtain a digital binary image of the pill being dispensed. The image is further processed using erosion and dilation. The actual number of drug in the image is determine by applying connected component labeling and centroid process. Our experiment used 6 mm. to 12 mm. samples with accurate results. ©2012 IEEE.
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Simultaneous mean brightness preservation and contrast improvement via multi-peak Histogram Equalization
(2011-01-01)
Cheevasuvit, Fusak
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Phanthuna, Nattapong
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Nilas, Phongchai
Histogram Equalization is a traditional image improvement method for enhancing image contrast. However, this image contrast improvement is unsuitable for some consumer electronic applications since mean brightness of output image is different from that of the original image. Nevertheless, when the average brightness of the output image is close to the mean brightness of the original image, its contrast is also decreased thereby reducing efficiency of contrast improvement algorithm. In this paper, we propose a method that not only preserves the mean brightness but also improves the contrast of the output image. By separating the Histogram into Sub-histograms or Multi-peak histogram based on local minima, each sub-histogram will be spread out in a maximum dynamic range based on their gray level interval proportions. Subsequently, the conventional histogram equalization is independently applied to sub-histogram of each peak. To preserve the mean brightness, positions of local minima will be finely adjusted by shifting them within a certain gray scale interval. During each adjustment, sub-histograms of the two local minima which connected to the new local minimum point are re-equalized again. Finally, standard deviation will be normalized in order to improve contrast of the output image. © 2011 The Institute of Electrical Engineers of Japan.
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Design and implementation of novel impedance measurement using digital sine-wave oscillator with optimum phase and amplitude
(2009-12-01)
Praesomboon, Sukanya
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Jongsataporn, Thitaphan
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Yimman, Surapun
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Cheevasuvit, Fusak
This paper proposed the AC bridge circuit, which can be used to measure unidentified impedance of the system. The AC bridge circuit takes the advance of both a digital sine-wave oscillator, which can promptly adjust the phase of generated signals, and a successive approximation technique, which can profoundly search for the unknown impedance. Therefore, the optimum phase and the suitable amplitude can be immediately determined for the AC bridge circuit. In this study, the unknown impedance were calculated by the AC bridge circuit at these following frequencies 50Hz, 100Hz, 300Hz, 500Hz, 750Hz and 1kHz. When compared with the LCR meter (Agilent 4284A), the result of the measured impedance from the AC bridge circuit has revealed the impedance with estimate 1% average error, which suggested that AC bridge circuit is a perfectly innovation method for identifying the unknown impedance. © 2009 SICE.
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Micromachined piezoresistive tactile sensor array fabricated by bulk-etched MUMPs process
(2003-07-14)
Lomas, Tanom
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Tuantranont, Adisorn
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Cheevasuvit, Fusak
This paper discusses the design, fabrication and testing of a 5×5 micromachined tactile sensor array for the detection of an extremely small force (micrometer-Newton range). Central contacting pads that are trampoline-shape suspended structures and sensor beams are formed using an anisotropic etching of silicon substrate of a MUMPs process chip. A piezoresistive layer of polysilicon embedded in sensor beams is used to detect the displacement of the suspended contacting pad. Each square tactile has dimension of 200 μm × 200 μm with 250 μm center-to-center spacing. The entire sensor area is 1.25 mm × 1.25 mm. The device was characterized under various normal force loads using weight microneedles. The individual sensor element shows the linear response to normal force with good repeatability.
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1 V, high speed, full swing non-complementary BiCMOS inverter circuit using feedback scheme
(2002-12-01)
Dejhan, Kobehai
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Tooprakai, Paiboon
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Mitatha, Somsak
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Cheevasuvit, Fusak
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Soonyeekan, Criatcharin
This paper proposes a new BiCMOS inverter. This circuit has a high speed, full swing with noncomplementary structure. The proposed circuit employs feedback scheme to increase a base current of bipolar transistor. It improves the propagation delay time. The results of circuits are shown using PSPICE program simulation based on 0.35 μm technology. © 2002 IEEE.
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1V full swing bootstrapped CMOS inverter circuit
(2002-12-01)
Dejhan, Kobchai
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Tooprakai, Paiboon
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Mitatha, Somsak
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Cheevasuvit, Fusak
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Soonyeekan, Chatcharin
This paper proposes a low voltage and full swing bootstrapped CMOS inverter circuit, designed by using the output drive CMOS transistors same as the conventional CMOS inverter in both pull up and pull down section. In pull up section, the overdrive at gate of pull up section is used by bootstrapped scheme. The circuit has the high speed full-swing operation and this circuit operates on 1 volt supply voltage, the simulations output waveforms and time delay are investigated by using PSPICE program. © 2002 IEEE.
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Programmable multi-frequency SPIM drive for suitable energy
(2001-12-01)
Tipsuwanporn, Vittaya
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Cheevasuvit, Fusak
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Ngamwiwit, Jongkol
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Sawaengsinkasikit, Winyu
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Komine, Noriyuki
This paper had been focused on developing a methodology for control speed of a Single Phase Induction Motor (SPIM) by using a Binary Rate Multipliers (BRM) technique and a programmable multi-frequency technique(40-80Hz) in order to control suitable energy supplying to motor. Voltage and current are known then power can be calculated by using Vector Space method. The results (torque and speed) are feed back to two Proportional - Integral (PI) controllers in order to select BRM patterns that can be generated up to 256 forms. From these procedures that are speed control principle, and time response of returning to normal situation at both loading and no load is less than 1.0 second. Furthermore, power factor at no load and full load is also increased. Thus, higher efficiency is achieved.
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A high frequency and full swing BiCMOS square wave generator
(2001-12-01)
Limpaiboon, Siriwat
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Dejhan, Kobchai
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Mitatha, Somsak
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Cheevasuvit, Fusak
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Junnapiya, Somyot
This paper proposes a design of square wave generator by using TS-FS BiCMOS circuit (Transient Saturation-Full Swing) and CMOS feedback inverter circuit working with capacitance. This proposed circuit is able to generate the high frequency signal with 1.5 volt supply. The capacitance is used to assign the frequency, the duty cycle can be adjusted by using the ratio of W/L of NMOS and PMOS transistors in the circuit.
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Low voltage, full swing bootstrapped CMOS inverter circuit
(2001-12-01)
Leelasophit, Suphachai
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Dejhan, Kobchai
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Mitatha, Somsak
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Cheevasuvit, Fusak
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Junnapiya, Somyot
This paper proposes a low voltage and full swing bootstrapped CMOS inverter circuit, designed by using the output drive CMOS transistors same as the conventional CMOS inverter in both pull up and pull down section. In pull up section, the overdrive at gate of pull up section is used by bootstrapping scheme. The circuit has the high speed full-swing operation and this circuit operates on 1 volt supply voltage, the simulations output waveforms and time delay are investigated by using PSpice program.
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CMOS dual output current mode half-wave rectifier
(2001-12-01)
Monpapassorn, Adisak
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Dejhan, Kobchai
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Cheevasuvit, Fusak
A CMOS dual output current mode half-wave rectifier is presented. The proposed rectifier is composed of three main components: a dual output V-I converter, two half-wave current rectifiers and two I-V converters. A voltage input signal is changed into two current signals by the V-I converter. The current rectifiers rectify these current signals, resulting in positive and negative half-wave current signals that are converted to positive and negative half-wave voltage signals by the I-V converters. The theory of operation is described, and the simulated results obtained from the PSPICE program are used to verify the theoretical prediction. Simulated rectifier performance with a 0.5 μm MOSFET model using ±1.2 V supply voltage demonstrates good rectifier integrity at operating frequencies up to 100 MHz.

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