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Author: search.filters.author.Julsereewong, AmphawanSubject: search.filters.subject.Algorithmic ADC

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    Item type:Publication,
    A voltage-mode gray-code algorithmic ADC
    (2008-12-01)
    Arayawat, Somjai
    ;
    Thubtong, Uthan
    ;
    Julsereewong, Prasit
    ;
    Riewruja, Vanchai
    ;
    Julsereewong, Amphawan
    This paper presents a design technique of a Gray-code algorithmic analog-to-digital converter (ADC) operating in voltage mode. The realization method is based on the use of commercial available devices. The proposed converter comprises the operational transconductance amplifiers (OTAs), diodes, resistors, and voltage comparator to synthesize the triangular-like DC transfer characteristic and digital output for one-bit cell ADC. An N-bit resolution can be simply implemented by cascading the N proposed one-bit cells. Experimental results verifying the circuit performances are agreed with the theoretical values. © 2008 SICE.
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    A simple CMOS-based algorithmic ADC
    (2007-12-01)
    Kaewpoonsuk, Anucha
    ;
    Cheypoca, Thepjit
    ;
    Julsereewong, Amphawan
    ;
    Riewruja, Vanchai
    This paper presents a one-bit cell of reverse Gray-code algorithmic analog-to-digital converter. The proposed converter comprises of full-wave rectifier, current mirrors, and current comparator. The realization method is simple, small in size, and suitable for integrated circuit form. The design strategy is based on the MOS biased at the edge of conduction to provide a low accumulated error and a low distortion in the transfer characteristic. An N-bit resolution can be achieved by cascading of the N proposed one-bit cells. PSPICE simulation results supporting the characteristics of proposed circuit are agreed with the expected values. © ICROS.