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Author: search.filters.author.Julsereewong, AmphawanSubject: search.filters.subject.Full-wave rectifier

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    Alternative of high voltage multipliers utilizing Cockcroft–Walton multiplier blocks for 220 V and 50 Hz input
    (2020-12-01)
    Jaiwanglok, Anurak
    ;
    Eguchi, Kei
    ;
    Julsereewong, Amphawan
    ;
    Pannil, Pittaya
    In order to be practical for converting 220 V and 50 Hz AC input into high DC output ranged between 3.5 and 4.0 kV to create underwater shockwaves in non-thermal technique for processing foods, this article presents an alternative approach for modifying conventional high voltage multipliers without magnetic elements, which are based on the use of parallel-connected Cockcroft–Walton multiplier blocks (CWMBs) in bipolar structure. The basic three-stage CWMB scheme as well as the effect of different capacitor values on its output is described. The modified high voltage multiplier with improved response speed consists of a full-wave rectifier (FWR), a two-phase driver block, a parallel-connected positive CWMB, and a parallel-connected negative CWMB. Both output voltage and power efficiency of the proposed scheme can be demonstrated by theoretical analysis results. Moreover, simulation results showing the characteristics of the proposed high voltage multiplier are also included.
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    Modification of Cockcroft-Walton-based high-voltage multipliers with 220 V and 50 Hz input for non-thermal food processing apparatus
    (2020-08-01)
    Jaiwanglok, Anurak
    ;
    Eguchi, Kei
    ;
    Smerpitak, Krit
    ;
    Julsereewong, Amphawan
    A design of high-voltage multipliers to generate underwater shockwaves is one of the most important factors for successfully providing non-thermal food processing in a cost-effective manner. To be capable of fully utilizing the Cockcroft-Walton-based high-voltage multipliers for underwater shockwave generation, this paper presents a topological modification of three interesting design approaches in bipolar structure for 220 V and 50 Hz AC input to generate more than 3.5 kV DC output within short time periods. In addition to Cockcroft-Walton multipliers (CWMs), the first modified scheme employs a positive full-wave rectifier (FWR) and positive voltage multiplier block (VMB), the second modified scheme employs positive/negative half-wave rectifiers (HWRs), and the last modified scheme employs a switched-capacitor AC-AC converter. To comparatively analyze their performances, the digitally controlled operations of the modified realization schemes as well as their electrical characteristic estimation based on a four-terminal equivalent model are described in detail. The effectiveness of three modified circuit configurations and the correctness of the given theoretical analysis are verified through SPICE (Simulation Program with Integrated Circuit Emphasis) simulation results. The formulas achieved from theoretical estimation are particularly useful when designing the proposed high-voltage multipliers (HVMs) because good agreement between the theoretical and simulation results can be achieved.
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    A simple CMOS-based algorithmic ADC
    (2007-12-01)
    Kaewpoonsuk, Anucha
    ;
    Cheypoca, Thepjit
    ;
    Julsereewong, Amphawan
    ;
    Riewruja, Vanchai
    This paper presents a one-bit cell of reverse Gray-code algorithmic analog-to-digital converter. The proposed converter comprises of full-wave rectifier, current mirrors, and current comparator. The realization method is simple, small in size, and suitable for integrated circuit form. The design strategy is based on the MOS biased at the edge of conduction to provide a low accumulated error and a low distortion in the transfer characteristic. An N-bit resolution can be achieved by cascading of the N proposed one-bit cells. PSPICE simulation results supporting the characteristics of proposed circuit are agreed with the expected values. © ICROS.