KMITL

Permanent URI for this communityhttps://dspace.kmitl.ac.th/handle/kmitl/1

Browse

Settings

Author: search.filters.author.Maitreechit, S.Subject: search.filters.subject.ADC

Search Results

Now showing 1 - 1 of 1
  • Loading...
    Thumbnail Image
    Some of the metrics are blocked by your 
    consent settings
    Item type:Publication,
    Low power current-mode algorithmic ADC in half flash (BCD)
    (2006-12-01)
    Chuenarom, S.
    ;
    Maitreechit, S.
    ;
    Roengruen, P.
    ;
    Tipsuwarnpron, V.
    This paper presents a principle of analog to digital converter (ADC) based on current mode half flash (BCD). This circuit can be converted to 4-bit output at each moment, and multiple output bit numbers by serial connection. It use a current injection technique to increase the speed of current mirrors, low power and algorithmic ADC application is presented. A current mode, the active current mirror and current comparators that controlled reference current by W/L ratio, has been used. Its feasibility agrees with simulation results of PSPICE program. The circuit design used CMOS 0.5μm which is capable to the slowest conversion time is less than 5.2nS , resulting in a conversion rate of more than 195 MHz , power consumed 1mW , input current 0-60 μA and single 2.5V supply. ©2006 IEEE.