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Sub-30 ppm/oC high-frequency temperature-compensated CMOS relaxation oscillator
(2018-07-02)
Sakphrom, Siraporn
;
Limpiti, Thunyawat
;
Wichaipanich, Noraset
;
Thanachayanont, Apinunt
This paper describes the design and realization of a high-frequency temperature-compensated CMOS relaxation oscillator in a 0.35-µm CMOS technology. The proposed oscillator employs the current-controlled topology with a resistive source-degeneration transconductor and a current comparator in order to achieve high oscillation frequency and low power dissipation. Temperature compensation of the oscillation frequency is achieved by simulation results show that, at a nominal oscillation frequency of 32.48 MHz, the proposed oscillator exhibited a temperature coefficient of less than 28.41 ppm/oC over a temperature range of -40oC to +120oC, while consuming 241.5 µW from a 2.5-V single power supply voltage.
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A Sub-100ppm/∘C Temperature-Compensated High-Frequency CMOS Relaxation Oscillator
(2016-01-01)
Sakphrom, Siraporn
;
Georgiou, Pantelis
;
Thanachayanont, Apinunt
A temperature-compensated high-frequency CMOS integrated relaxation oscillator with low frequency variations is presented. A current-controlled oscillator topology is employed with a resistive source-degenerated transconductor and a current comparator to achieve high oscillation frequency and low power dissipation. The proposed oscillator was designed with process parameters from a standard 0.35-μm CMOS technology and a 2.5-V single power supply voltage. At a nominal oscillation frequency of 21 MHz, the total power dissipation of the circuit was 201 μW. Post-layout simulation results showed that the frequency variations were less than 34.16ppm/∘C over a temperature range of -40 to +120∘C.
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A low-power CMOS RF power detector
(2012-12-01)
Sakphrom, Siraporn
;
Thanachayanont, Apinunt
This paper describes the design and implementation of a low-power wide dynamic range radio-frequency (RF) power detector in a standard 0.18-μm CMOS process. The proposed circuit includes a root-mean-square (RMS) power detector and a logarithmic amplifier. The RMS power detector exploits the nonlinear characteristic of MOSFET to realize the RMS conversion. A current-mirror active load is used in the RMS power detector to increase the RMS conversion gain. Since the output of the RMS power detector is a DC voltage, the following logarithmic amplifier does not require wide operating bandwidth, thus allowing simple circuit realization with minimum power dissipation. Simple differential amplifier is used to realize the limiting gain stage. Post-layout simulation results showed that the proposed circuit was able to detect input power from -70 dBm to -20 dBm with signal frequencies ranging from 0.5 GHz to 5 GHz, while dissipating only 0.9 mW under a 1.8-V power supply voltage. © 2012 IEEE.
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A class-AB CMOS variable gain amplifier for low-voltage applications
(2007-12-01)
Khumsat, Phanumas
;
Sakphrom, Siraporn
;
Thanachayanont, Apinunt
A compact class-AB variable gain amplifier has been proposed. The amplifier structure is based on two-stage architecture comprising a linear transconductor cascaded by a class-AB current amplifier-based feedback transimpedance amplifier. The major advantage of such VGA circuit is its ability to offer a good degree of signal linearity without sacrificing the original advantages of its predecessor on both aspects of the power consumption and circuit complexity. Superiority of the proposed VGA has been confirmed by circuit simulation employing 0.18μm standard CMOS technology in designing a 10-MHz VGA under 0.5-V voltage supply with MOS's minimum threshold voltage of 0.43V while draining static power consumption less than 25μW. © 2007 IEEE.

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