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    Item type:Publication,
    A Versatile Cell of Multimode First-Order Universal Filter Using VCIIs
    (2025-01-01)
    Buakaew, Seangrawee
    ;
    Silaruam, Vinai
    This article presents a new generic core cell for designing the first-order universal filter employed second-generation voltage conveyor (VCII<sup>+</sup>). With appropriate admittance selection, the proposed core cell can derive four different filter types, namely, low-pass, high-pass, inverting all-pass, and noninverting all-pass functions and encompassing four basic modes: current mode (CM), voltage mode (VM), transimpedance mode (TIM), and transadmittance mode (TAM). The primary feature of the proposed filters is the ability to cascade the circuit easily, eliminating the need for an extra buffer. The proposed circuits were confirmed by 0.18-μm TSMC CMOS process technology simulations. Numerous simulation results are included to verify the validity of the proposed circuits. Moreover, the experimental results of some proposed circuits from the commercial device built around AD844 agree well with the theory.
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    Item type:Publication,
    Novel resistorless mixed-mode PID controller with improved low-frequency performance
    (2013-10-22)
    Silaruam, Vinai
    ;
    Lorsawatsiri, Anuree
    ;
    Wongtaychatham, Chariya
    This paper introduces a new resistorless mixedmode proportional-integral-derivative (PID) controller. It employs six simple transconductors and only two grounded capacitors. The proposed PID controller offers several advantageous features of resistorless configuration, use of grounded capacitors, independent electronic-tuning characteristic of its parameters, and mixed-mode operation such as current, transimpedance, transadmittance, and voltage modes. The parasitic element effects of the transconductors on the proposed controller are investigated and the improved low-frequency performance of the proposed controller is then discussed. As applications, the proposed controller is demonstrated on two closed-loop systems. The PSPICE simulations with TSMC 0.18μm CMOS process and ±0.9 V supply voltage verify the theoretical analysis.