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Item type:Publication, Timer-Based Capacitance-to-Voltage Converter(2026-03-01) ;Kaewpoonsuk, Anucha ;Tokampang, Sudarat ;Sisuk, Noppadon ;Rerkratn, ApinaiPetchmaneelumka, WandeeThis article presents the design and analysis of a capacitance-to-voltage converter based on 555-timer Integrated Circuits (ICs) as the core design element. The circuit structure consists of two primary active components: two 555-timer ICs connected in conjunction with a low-pass filter circuit. The first 555-timer IC operates in astable mode to generate a signal that controls the timing of the second IC. The target capacitor or capacitive sensor to be measured is connected to the second 555-timer IC, which operates in monostable mode. The output signal from the second 555-timer IC is then converted into a DC voltage output using a low-pass filter circuit. The circuit was tested using laboratory capacitors in the range of 52.72 pF to 807.61 pF, and the data were analyzed using Microsoft Excel. The results showed excellent agreement with the measurements obtained from the GW INSTEK LCR-819. The maximum uncalibrated error was found to be −3.32% of full scale. After applying linear curve fitting in Excel, the maximum error was reduced to 0.92% of full scale, confirming the effectiveness of the calibration approach. Furthermore, the circuit was applied to measure the moisture content of paddy rice using a cylindrical capacitive sensor within the moisture range of 12.1% to 23.2%. The experimental data were fitted to a derived equation, which was then used to predict rice moisture content, producing results that corresponded closely with those obtained from the KETT PM-450 grain moisture meter. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Development of a Phase-Locked Loop Circuit in Running Frequency Mode for Capacitance-to-Voltage Conversion(2025-01-01) ;On-Khong, Tada ;Sisuk, Noppadon ;Wardkein, Paramote ;Katman, RatchanooPrompak, KriangsakCapacitance-to-voltage conversion is essential for capacitive sensors in various industries, including touch interfaces, medical devices, and moisture measurement. However, circuit design faces challenges like non-linearity, noise, and small capacitance variations affecting voltage signals. This article proposes a phase-locked loop in free-running oscillator mode with a frequency-to-voltage converter to enhance accuracy and stability. Test results show a 97.9% measurement accuracy, demonstrating reduced noise and improved stability. The proposed circuit is ideal for high-precision applications in diverse environments, overcoming limitations of traditional methods. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, DEVELOPMENT OF AN EMBEDDED EXERCISE POSTURE PREDICTION SYSTEM FOR OFFICE SYNDROME USING MACHINE LEARNING(2024-12-01) ;Sisuk, Noppadon ;Onkhong, Tada ;Kaewpoonsuk, Anucha ;Wardkein, ParamotePrompak, KriangsakOffice syndrome is a condition with a high prevalence among people of working age and an upward tendency. In this study, a wearable device implant based on machine learning will be created for exercise of office syndrome. Developing a machine learning model that can distinguish 3 exercise postures for implantable devices was the objective of the study. The Edge Impulse online software was used for data collecting, preprocessing, training, and testing. After that, the model was successfully installed and tested on an Arduino Nano 33 BLE microcontroller. In addition to designing embedded systems, this work also developed applications through the App Inventor program for exercising properly. From testing the system, the model showed an average classification accuracy of 97.6% of exercise postures. The results of testing the embedded system in conjunction with the presented application on 10 subjects showed that the system was able to provide predictive accuracy for wrist exercises, shoulder exercises and stretch exercises with 95%, 97%, and 93%, respectively. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Ultrasonic Distance Detection Based on Forced Oscillation of Quadrature Oscillator(2020-03-01) ;Sudtana, Sukkan ;Sisuk, Noppadon ;Prompak, Kriangsak ;Keawpoolsuk, AnuchaManeegirapragarn, NarongritIn this article, the detection of distance with ultrasonic wave based on finding travel time forward and backward or time of flight (TOF) with oscillator circuit at the receiver that operates under forced oscillation is proposed. Because of this detection, there is no need for the distance-measuring receiver circuit to use mixer circuit. This is because there are some behaviors of the oscillator and the mixer under the force oscillation. For this proposed system, it consists of And Gate for on-off to transmit ultrasonic signal with 40 kHz frequency. At the receiver, quadrature oscillator circuit is used to be a mixer and local oscillator in a single circuit. So, it causes the proposed circuit is also low complexity and low power consumption. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Velocity detection by ultrasonic doppler based on multi-time technique analysis(2019-07-01) ;Sudtana, Sukkan ;Prompak, Kriangsak ;Suphramit, Suphawadee ;Sisuk, NoppadonBoonjun, SurapolExperimental result of velocity measuring technique, namely, The ultrasonic Doppler, the technique employs a phase shift oscillator to be combination of signals for mixer replacement and tracks the Doppler frequency, is reported. The received ultrasonic signal was fed to the phase shift oscillator that generate 40.7 kHz of natural frequency as same as transmitted frequency. An output response of received ultrasonic present evidently in Doppler frequency which is proportional to velocity of object. Additionally, The great advantage of the multi-time technique could be used in order to predict its behavior. Measurement results verify the efficacy and agree well with analysis. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Analysis of beat frequency detector based on basic logic gates(2018-08-01) ;Kaewpoonsuk, Anucha ;Sisuk, Noppadon ;Smerpitak, KritWardkein, ParamoteThe aim of this paper is to introduce a simple technique to analyze the operation of the basic logic gates-based beat frequency detector (BFD). We show that all of the basic logic gates, including AND-gate, NAND-gate, XOR-gate, XNOR-gate, OR-gate, and NOR-gate, can be used as a mixer to implement the BFD. This BFD is simple, easy to assemble, and can be used in control, instrument and measurement systems. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Design and analysis of single phase pure sine inverter based on phase locked loop(2016-10-01) ;Sisuk, Noppadon ;Suphramit, Suphawadee ;Kaewpoonsuk, AnuchaWardkien, ParamoteThis article proposes the new technique of the PWM oscillation based on phase locked loop that controls the inverter. The PWM works together with push-pull where it is connected to the step-up transformer. The advantages of proposed technique are that the PWM circuit is non-complicated of structure and that the PWM circuit can prevent from a noise signal. In addition, a carrier frequency can be adjusted at a frequency running with the VCO of a phase locked loop. The PWM output which is obtained from the push-pull inverter has high symmetry voltage. Ultimately, the PWM is passed through the LC low pass filter where high pure sine wave signal occurs. As a result, the total harmonic distortion (THD) is decreased which is equal to 2.27%. Due to the related proposed technique, the output voltage regulation is improved and the dynamic response ofa step load change is also improved. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Damping coefficient detector for damped oscillation(2016-01-01) ;Suphramit, Suphawadee ;Sisuk, Noppadon ;Kaewpoonsuk, AnuchaWardkein, ParamoteIn this research, the damp coefficient detector of damped oscillation is designed by analog signal processing and also relies on the current conveyor, which is indicated. It consists of four parts: a peak detector, a logarithmic amplifier, a limiting circuit and a differentiator amplifier. The peak detector output voltage has achieved the DC voltage which decays exponentially with time. Then, it is converted by the logarithmic amplifier in order of the linearity decays of the voltage and is revealed as the negative slope. Since the magnitude voltage of the peak detector is decreased until it rapidly approaches to zero, the analysis will not be in accordance with the idealized case. Thus, the limiting circuit is connected in front of the differentiator amplifier. This circuit functions as a maximum detector between the logarithmic amplifier and one of constants. Finally, the differentiator amplifier is applied to determining the derivative of limiting circuit output voltage. While, the input voltage indicates the under damped oscillator which is acquired by the RLC circuit and is investigated by distinct conditions. Consequently, the output signal obtains a DC voltage signal which has direct proportion with a damped oscillation. In addition, the relation between the analysis and PSPICE simulation results is also consistent.
