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    Low-voltage high-speed PWM signal generations based on relaxation oscillator
    (2002-01-01)
    Siripruchyanun, M.
    ;
    Wardkein, P.
    This paper new two simple PWM (pulse width modulation) signal generations based on a modified relaxation oscillator are introduced. The advantages of the proposed principle are that the precise PWM signal can be easily achieved with a high frequency range up to several megahertz and a low-voltage power supply. The proposed circuits are able to accept either voltage or current modulating signals. They are very suitable for developing into integrated circuit (IC) form in communication applications. The simulation and experimental results are also depicted, and show good agreement with theoretical predictions.
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    Blocking probability of the reverse link cellular CDMA system
    (2002-01-01)
    Kumpairee, C.
    ;
    Kimpan, C.
    ;
    Pin-Ngern, O.
    ;
    Hemmakorn, N.
    ;
    Noppanakeepong, S.
    The blocking probability of the reverse link cellular CDMA system is presented. Gaussian and lognormal approximation are the methods for determination of blocking probability. In the analysis in this paper, the parameter for the number of resolvable paths over a Rayleigh multipath fading channel is presented. In addition, we also show the effect of power control errors.
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    On the algorithm for adaptive noise canceller with parallel block structure
    (2002-01-01)
    Kidakorn, P.
    ;
    Rattanakoch, W.
    ;
    Kimpan, C.
    ;
    Pin-Ngern, Ouen
    ;
    Noppanakeepong, S.
    An adaptive algorithm for detecting a single sinusoid of unknown frequency corrupted by Gaussian noise was proposed by Nishimura et al. (Trans. IEICE, vol. J72-A, no. 5, pp.786-794, 1989) using a IIR band pass filter with a variable center frequency and parallel block structure for fast processing. In 1996 an adaptive algorithm was investigated which solved the problem whereby the presence of several input frequencies led to the situation of it being impossible to achieve convergence using the new algorithm proposed by Takahashi et al. (Proc. IEEE APCCAS'94, pp. 376-381, 1994). However, the control signal generated by the new algorithm, used for adjusting the center frequency of the band pass filter, still jitters in spite of its convergence. In this paper, in addition to using the output in an adaptive algorithm as proposed, the input signal is used as an auxiliary or reference signal. In this way the jitter on the control signal can be reduced significantly, with the same convergence rate, with little added computational complexity.
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    A robust variable step-size LMS-like algorithm for a second-order adaptive IIR notch filter for frequency detection
    (2001-01-01)
    Punchalard, R.
    ;
    Benjangkaprasert, C.
    ;
    Anantrasirichai, N.
    ;
    Janchitrapongvej, K.
    The best adaptive algorithm requires fast convergence speed, low variance, unbias and low steady-state mean square error (MSE) in both low and high signal-to-noise ratio (SNR) situations. We have proposed a robust variable step-size LMS-like algorithm (VS-LMS-L) for a second-order adaptive IIR notch filter for frequency detection in radar, sonar and communication systems. This algorithm is compared with the conventional LMS-like algorithm called the plain gradient algorithm (PG). The time-varying step-size μ(n) is adjusted by using the square of the time-averaged estimate of autocorrelation of the present output signal y(n) and the past one y(n-1). This technique can reject the effect of the uncorrelated noise sequence on the step-size update, resulting in a small MSE due to the small final μ(n). Moreover, this algorithm can also improve the convergence speed by comparison with the PG at the same MSE value.
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    Multiphase sinusoidal oscillators using translinear current conveyors and only grounded passive components
    (2001-01-01)
    Loescharataramdee, C.
    ;
    Kiranon, W.
    ;
    Sangpisit, W.
    ;
    Yadum, W.
    A generalized multiphase sinusoidal oscillator is presented. The circuit realization uses the translinear bipolar second generation current-controlled conveyors to generate arbitrary n current signals equally spaced in phase. The proposed circuit consists of n multi-output current controlled conveyors and a current amplifier connected in cascade. The only passive component employed in each of the n conveyors is one grounded capacitor. The oscillation condition and oscillation frequency are independently controlled. The former depends only on the number of the phase signals of the oscillator. The dependency of the latter on the input resistance of the input ports of the current conveyors makes electronic tunability possible using the bias currents. The circuit also enjoys having simple structure and very low component count and it is highly suitable for monolithic implementation.