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    Low-voltage, rail-to-rail, Gm-enhanced pseudo-differential class-AB OTA
    (2004-12-01)
    Thanachayanont, A.
    ;
    Chaloenlarp, W.
    This paper presents a new class-AB pseudo-differential operational transconductance amplifier (OTA) for low-voltage and high-speed switched-capacitor circuits. The proposed OTA employs partial positive feedback to enhance the input transconductance, thus increasing the open-loop DC gain and the unity-gain frequency. A push-pull configuration is used to obtain rail-to-rail output voltage swing. Using a 0.35-μm digital CMOS process, the proposed OTA can obtain 78-dB DC gain, 72.5° phase margin, 100-V/μs slew rate with 1-pF load capacitor, while draining 170-μA quiescent supply current from a single 1-V power supply voltage.
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    Low-voltage pipelined ADC using class-AB pseudo-differential OTA
    (2004-12-01)
    Chaloenlarp, W.
    ;
    Thanachayanont, A.
    This paper describes the design of a low-voltage low-power pipelined analog-to-digital converter using a new class-AB pseudo-differential operational transconductance amplifier (OTA). The class-AB OTA employed in this work makes use of partial positive feedback to enhance its transconductance, which allows large gain-bandwidth product with low power dissipation. A 6-bit 15.36-MS/s pipelined ADC has been designed using a 0.35-μm CMOS process. Simulation results show that the ADC can achieve a maximum DNL and INL of 0.5 LSB and 0.59 LSB, respectively, and an SFDR of 47.5 dB, while draining 2.8 mA from a 2 V supply voltage.
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    Low-voltage Gm-enhanced class-AB pseudo-differential OTA for switched-capacitor circuits
    (2004-12-01)
    Chaloenlarp, W.
    ;
    Thanachayanont, A.
    A new low-voltage, rail-to-rail output swing, class-AB pseudo-differential operational transconductance amplifier (OTA) for high-speed switched-capacitor applications is proposed. Positive feedback is employed to enhance the input transconductance, which increases the open-loop DC gain and the unity-gain frequency of the OTA. Using a 0.35-μm CMOS process, the proposed OTA can obtain 78-dB DC gain, 72.5° phase margin, 100-V/μs slew rate with 1-pF load capacitor, while draining 170-μA quiescent supply current from a single 1- V power supply voltage. © 2004IEEE.