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    BRM technique for space vector decomposition reactive power of SPIM
    (1999-12-01)
    Tipsuwanporn, V.
    ;
    Cheevasuvit, F.
    This research paper proposes the controlling technique of Single Phase Induction Motor (SPIM) by Binary Rate Modulation (BRM). The BRM composes of 8 independent patterns, these patterns can be linearly combined into 255 pattern forms, then transmit to control motor speed. Applying this technique along with vector space will result in power factor increasing and reactive power decreasing. When load is at threshold state it can be brought to the steady state condition at short instant, consequently the capacity and efficiency will be improved.
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    BRM fast response DC motor speed control
    (1999-12-01)
    Tipsuwanporn, V.
    ;
    Cheevasuvit, F.
    ;
    Piyarat, W.
    ;
    Siribanchachai, W.
    ;
    Paraken, Y.
    The paper presents, hithtero contribute the DC motor control by Binary Rate Modulation (BRM). The 8 bit binary rate are controlled by 8051 which inturn generate BRM by PI(Proportional Integral Controller). The BRM method is efficient to control the supplied power with appropriate speed. BRM method has low ripple, usually less than 5%, consequently, less noise with fast speed response when load changes.
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    Voltage to frequency converter independent BRM generator
    (1999-12-01)
    Tipsuwanporn, V.
    ;
    Cheevasuvit, F.
    ;
    Kittisiam, T.
    ;
    Piyarat, W.
    ;
    Paraken, Y.
    This paper presents hitherto, the analysis and construction of the voltage to frequency (VFC) of binary rate multipliers (BRM) signals. The signals spectrum associated the energy is selected to construct the BRM signal, the VFC circuit is designed in order to transmit the pulse train by multiplexing. The input is adjustable voltage to give the continuous BRM output. The input voltage between 1 to 5 Volts with frequency 0 to 625 kHz, ± 2.5 Volts consisted of 4 waveforms, sine, triangular, sawtooth, and square. The stability of the circuit is obtained from feedback of the average value at output.
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    Mosaicing of multi-resolution satellite images
    (1998-12-01)
    Hinsamooth, N.
    ;
    Cheevasuvit, F.
    ;
    Dejhen, K.
    ;
    Mitatha, S.
    ;
    Somboonkaew, A.
    The mosaicing image is very useful for the simultaneous interpretation of a given area. However in some cases, it is not possible to use contiguous images due to the existence of cloud or the time of degradation of interpretation efficiency. To overcome this problem, the mosaicing of multi-image acquisition is proposed. In this approach, a mosaicing image can be derived by using images obtained from different satellites at different resolutions.
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    Contrast enhancement using multipeak histogram equalization with brightness preserving
    (1998-12-01)
    Wongsritong, K.
    ;
    Kittayaruasiriwat, K.
    ;
    Cheevasuvit, F.
    ;
    Dejhan, K.
    ;
    Somboonkaew, A.
    Contrast enhancement of an image can efficiently be performed by histogram equalization. However, the global histogram equalization will cause an effect on brightness saturation in some almost homogeneous area. Therefore, the multipeak histogram equalization has been proposed. Each detected peak of histogram is independently equalized. The effect of brightness saturation can be defeated, as the perceptibility can be improved. By using histogram equalization method, the output image can be preserved the mean value brightness of the input image.
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    A bipolar simple integrable sinusoidal oscillator
    (1992-01-01)
    Dejhan, K.
    ;
    Cheevasuvit, F.
    ;
    Trisuwannawat, T.
    ;
    Tipsuwanporn, V.
    ;
    Mitatha, S.
    A bipolar simple integrable sinusoidal oscillator is experimentally described. The controlling current is linearly related to the frequency of oscillation over a wide dynamic range close to four orders of magnitude. The percentage distortion is less than 1%. The temperature compensation is also carried out.
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    Analog operation in CMOS latch circuit for reducing dynamic power dissipation
    (1992-01-01)
    Dejhan, K.
    ;
    Cheevasuvit, F.
    ;
    Tipsuwanporn, V.
    ;
    Trisuwannawat, T.
    ;
    Prommas, E.
    Many approaches to study of analog operation in CMOS VLSI. This paper is focused on finding an analog operation using pMOS transistor which is used to control the variation of dynamic power dissipation of the CMOS static latch circuit. The results have been simulated using SPICE under 1.2μm HCMOS3 technology.
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    A versatile dual-mode transposition latch array design for DCT in HDTV applications
    (1992-01-01)
    Dejhan, K.
    ;
    Cheevasuvit, F.
    ;
    Trisuwannawat, T.
    ;
    Kaneko, M.
    A versatile optimal dual-mode matrix transposer using latch for the design of data format converter has been developed with optimization of latch/static register. The architecture has been designed with 1.2μm HCM0S3 technology for the best speed/area/power tradeoff. © 1992 IEEE
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    Image segmentation based on graph theory
    (1990-12-01)
    Cheevasuvit, F.
    This paper presents an automatic image classification by segmentation method based on graph theory, where each pixel of an image is mapped onto a vertex of graph and the vertices are connected by the link weights. The segmented regions are obtained by agglomerating the vertices which have minimum link weights under a given homogeneity condition. The result shows the segmented regions are connected and the segmented shapes are independent from the problem of scanning direction.
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    Filter coefficients of high-pass and band-elimination recursive digital filters with a maximally flat group delay
    (1979-10-01)
    Thajchayapong, P.
    ;
    Cheevasuvit, F.
    The design technique for a recursive digital filter with a maximally flat group delay at an arbitrary specified frequency is known. It is shown here that, for certain cases, the filter coefficients for high-pass and band-elimination recursive digital filters with a maximally flat group delay can be expressed in closed forms.