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Author: search.filters.author.Duangthong, ChatupornSubject: search.filters.subject.LDPC codes

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    Efficient Design of Read Voltages and LDPC Codes in NAND Flash Memory Using Density Evolution
    (2023-01-01)
    Duangthong, Chatuporn
    ;
    Phakphisut, Watid
    ;
    Wardkein, Paramote
    Low-density parity-check (LDPC) codes play an important role in the reliability enhancement of commercial NAND flash memory. Unfortunately, due to the requirement of the reading speed of NAND flash memory, the LDPC decoder will not obtain precise soft information to achieve high error-correcting capability. In this work, we use a density evolution (DE) algorithm to reveal the decoding threshold of the LDPC decoder affected by the read voltages. We propose the efficient design of read voltages so that the LDPC decoder has the lowest decoding threshold. Therefore, this method can guarantee that the designed read voltages are suitable for a given LDPC code. Moreover, since we found that the designed read voltages are related to the structure of the LDPC code, the joint design of the read voltages and LDPC code is then proposed to achieve the capacity of NAND flash memory. The simulation results demonstrate that our proposed design significantly improves the frame error rate (FER) performance of NAND flash memory.
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    Joint design of channel output quantizer and LUT-Based LDPC decoder
    (2021-05-19)
    Duangthong, Chatuporn
    ;
    Supnithi, Pornchai
    ;
    Phakphisut, Watid
    Recently, the LUT-based LDPC decoder has been designed by maximizing mutual information, where the performances of channel output quantizer and LUT-based decoder are considered separately. In this work, we propose the joint design of the channel output quantizer and LUT-based decoder. Our joint design aims to minimize the error probability of LDPC decoding through the density evolution algorithm. We found that the joint design outperforms the previous work at the waterfall region.