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Author: search.filters.author.Kasemsuwan, VarakornSubject: search.filters.subject.low power

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    A 0.5 V quasi-floating gate self-cascode DTMOS current-mode precision full-wave rectifier
    (2012-10-02)
    Mitwong, Hanphon
    ;
    Kasemsuwan, Varakorn
    This paper presents a 0.5 V quasi-floating gate self-cascode DTMOS current-mode precision full-wave rectifiers (PFWR). The circuit is designed based on improved Wilson current mirrors. All MOS transistors are biased on the edge of conduction, enabling the circuit to operate at low voltage with low power consumption. Negative feedback mechanism of the Wilson current mirror and cross coupling techniques have been employed to reduce the input impedance. Spectre is used to perform the simulation and the results show the frequency of operation as high as 100 MHz using a standard 0.13 μm CMOS technology. The mismatch between the input and rectifier's output is 0.24% for an input current of ±100 μA. The DC transfer characteristic shows good linearity, very sharp corner at zero crossing point and good symmetry during positive and negative input cycle, while power dissipation is 570 nW © 2012 IEEE.
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    A low-voltage low-power current-mode differential adjustable Schmitt trigger
    (2012-10-02)
    Tamnupan, Wuttipong
    ;
    Kasemsuwan, Varakorn
    This paper presents a low-voltage low-power current-mode differential adjustable Schmitt trigger. The proposed Schmitt trigger consists of current subtractor, current Schmitt trigger and voltage to current converter. The operation range is extended to all four quadrants of the input-output plane. Schmitt trigger is designed using UMC 0.13 μm CMOS technology and operates under the supply voltage of 0.7 V. The simulation results show that the hysteresis lie in the all quadrant of the input-output plane and the power dissipation is only 66 μW. © 2012 IEEE.
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    A 0.6 volt class-AB CMOS voltage follower with bulk-driven quasi-floating gate super source follower
    (2012-10-02)
    Wangtaphan, Skawrat
    ;
    Kasemsuwan, Varakorn
    This paper presents a design of 0.6 V class-AB voltage follower (VF) using 0.13 μm CMOS technology. The follower is developed based on the super source follower (SSF) using bulk-driven and quasi-floating gate (QFG) techniques. The proposed VF can operate at low voltage without DC level shift between the input and output terminals. The simulation results show the total harmonic of 0.3 % for an input/output voltage of 0.18 V <inf>pp</inf> at 100 kHz (R <inf>L</inf>//C <inf>L</inf>=5 kΩ//100 pF). The power dissipation is found to be 38 μW. © 2012 IEEE.