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    A compact floating and grounded memristor model using single active element
    (2022-12-01)
    Prasad, Sagar Surendra
    ;
    Kumar, Prashant
    ;
    Raj, Niranjan
    ;
    Sharma, Pankaj Kumar
    ;
    Priyadarshini, Bindu
    Memristor with defined operational specifications is a challenging task that promotes innovation in emulation circuit modelling. This article presents a single active block based compact memristor emulator architecture which is suitable for both floating and grounded circuit topologies. It effectively operates in incremental/decremental modes in both the configurations. The proposed model utilizes only one Differential Voltage Current Conveyor Transconductance Amplifier (DVCCTA) as an active block along with a few passive components. It discourages the use of extra sub-circuit components like multiple active blocks, summers and multipliers. The circuit is intended to work at ±1 V of dc power supply and has a power consumption of 8.74 mW. The proposed emulator model exhibits all the characteristics of an ideal memristor with an operating frequency of 12.8 MHz. It has wide working voltage range of 50–500 mV. The memristor model is built and simulated using the TSMC 0.18 μm CMOS process parameter. The reliability and effectiveness of the proposed model is verified through non-ideal, Monte-Carlo, process corner, non-volatility and temperature variation analysis. Furthermore, the memristor prototype is constructed on the breadboard using discrete ICs AD844AN and CA3080. The experimental outcome is found in accordance with the simulation. The applicability of the proposed memristor model is verified by implementing a memristor based Schmitt trigger circuit.
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    Electronically tunable MOS-only current-mode high-order band-pass filters
    (2017-01-01)
    Prommee, Pipat
    ;
    Tiamsuphat, Aphinat
    ;
    Taher Abuelma'Atti, Muhammad
    This paper presents new CMOS current-mode ladder Chebyshev and elliptic band-pass filters (BPFs). The signal flow graph and the network transformation methods are used to synthesize the proposed BPFs by using Chebyshev and elliptic RLC low-pass prototypes. CMOS-based lossy and lossless integrators with grounded capacitors are used to synthesize the proposed BPFs. The proposed filters can be electronically tuned between 10 kHz and 100 MHz by adjusting the bias current from 0.02 A to 200 A. Both filters use a 1.5 V DC power supply, which leads to low dynamic power consumption. Both filters enjoy total harmonic distortion of less than 1.5% along the range of the tuning bias currents. Simulation results are included to illustrate the functionality of the proposed filters.
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    Electronically tunable current-mode high-order ladder low-pass filters based on CMOS technology
    (2015-01-01)
    Kunto, Terdsak
    ;
    Prommee, Pipat
    ;
    Abuelma'atti, Muhammad Taher
    This paper describes the design of current mode low-pass ladder filters based on CMOS technology. The filters are derived from passive RLC ladder filter prototypes using new CMOS lossy and lossless integrators. The all-pole and Elliptic approximations are used in the proposed low-pass filter realizations. The proposed two types of filter can be electronically tuned between 10 kHz and 100 MHz through bias current from 0.03 μA to 300 μA. The proposed filters use 1.5 V power supply with 3 mW power consumption at 300 μA bias current. The proposed filters are resistorless, use grounded capacitors and are suitable for further integration. The total harmonic distortion (THD) of the low-pass filters is less than 1% over the operating frequency range. PSPICE simulation results, obtained by using TSMC 0.18μm technology, confirm the presented theory.