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Differential Difference Gain Amplifier (DDGA) and Its Applications
(2025-07-01)
Satansup, Jetsdaporn
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Pukkalanun, Tattaya
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Tangsrirat, Worapong
This article introduces a CMOS circuit realization of the fully balanced differential difference gain amplifier (DDGA). The proposed DDGA is realized using four floating current sources operating under dual supply voltages of approximately ∓0.9 V. The proposed circuit can function as a differential difference gain amplifier with electronically adjustable gain both in voltage and current-modes. The application designs of the DDGA to implement a single-input three-output universal biquad filter and voltage-mode quadrature oscillator circuit are also suggested. PSPICE simulation results for the proposed DDGA and its applications are provided using 0.18-μm CMOS technology from TSMC.
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LOW-VOLTAGE TEMPERATURE-INSENSITIVE LOGARITHMIC AND EXPONENTIAL FUNCTION CURRENT GENERATORS USING ONLY NPN TRANSISTORS
(2025-01-31)
Pukkalanun, Tattaya
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Satansup, Jetsdaporn
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Maneerat, Sutassa
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Tangsrirat, Worapong
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Roongmuanpha, Natchanai
The continuing reduction of supply voltage for reliable operation of analog integrated circuits is widely recognized. Analog circuits must adhere to this trend. As a result, researchers are currently developing low-voltage analog circuit methodologies. Current-mode signal processing circuits are examples of these concepts. Therefore, the objective of this work is to present circuit realizations of low-voltage current-mode logarithmic and exponential function generators with temperature compensation. Both the input and output signals operate in current mode. The design approach utilizes the current-mode translinear technique to produce the output currents that exhibit a directly proportionality to the absolute values of the logarithmic and exponential functions. By simply adjusting the external bias currents, one can electronically tune the output currents and transfer current gains for both proposed circuits. The proposed circuits utilize only npn bipolar transistors and can operate with low-level supply voltages of ±1 V, which are appropriate for low-power, high-frequency applications. Nonideality performance considerations are also discussed in detail. In order to verify the operational function of the circuits and illustrate their superior thermal stability, the PSPICE simulation has been performed using real transistor models provided for the HFA3096 mixed bipolar array technology. The simulation findings illustrate that the proposed logarithmic and exponential amplifier circuits can compensate for temperature variations, as evidenced by the good stability of their output currents over a temperature range of –40 °C to 100 °C.
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Design of Mixed-Mode Analog PID Controller with CFOAs
(2024-05-01)
Roongmuanpha, Natchanai
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Satansup, Jetsdaporn
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Pukkalanun, Tattaya
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Tangsrirat, Worapong
The design of a mixed-mode proportional-integral-derivative (PID) controller circuit using current-feedback operational amplifiers (CFOAs) as active components is proposed. With the same circuit topology, the proposed configuration of three CFOAs, four resistors, and two capacitors is capable of performing the PID controller in each of the following four modes: voltage mode, trans-admittance mode, current mode, and trans-impedance mode. Numerous mathematical analyses are conducted to determine the controller’s performance under both ideal and non-ideal conditions. Additionally, the mixed-mode second-order lowpass filter is suggested and also used to examine the workability of the proposed mixed-mode PID controller in a feedback control structure. The proposed PID controller is implemented with the commercially available IC-type CFOA AD844, and the simulation results are presented to illustrate the functionality of the controller and its closed-loop control system. According to the findings, the total power consumption of the proposed PID controller is 0.348 W, with symmetrical supply voltages of ±9 V. It also has a temperature variation of less than 0.2% over the AD844’s usable range. Monte Carlo statistical analysis results revealed that the gain responses of the controller exhibited a deviation of no more than 7.72% from the theoretical value. The controlled filter in a closed-loop control system has a 43% faster rise time and peak time than the uncontrolled filter in all four modes of operation. It also has a steady-state error less than 0.2 mV for voltage responses and 0.72 µA for current responses.
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Circular Object Sorting Machine with LabVIEW Software Control
(2024-01-01)
Mongkolwai, Pratya
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Satansup, Jetsdaporn
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Dumawipata, Teerasilapa
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Nakroungsri, Teerapat
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Laotuy, Monthathip
This article describes a project to construct a circular object-sorting machine through the application of image-processing techniques. For the acquisition, processing, and transmission of data, LabVIEW (Laboratory Virtual Instrument Engineering Workbench) software is utilized. The operation of the sorting device is controlled by an Arduino microcontroller board, which is the Arduino Mega 2560. The project aims to efficiently separate circular objects by extracting color information, size measurements, and quantity data through image processing. The experimental results successfully demonstrate the sorting of circular objects and display color values, size measurements, and the number of sorted objects on an efficient LCD screen. The integration of LabVIEW and Arduino provides an effective solution for circular object sorting, aligning with the theoretical principles presented in the project.
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Realization of Lossy Parallel Inductance Simulator Using Single VDGA and a Grounded Capacitor
(2022-01-01)
Satansup, Jetsdaporn
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Roongmuanpha, Natchanai
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Pukkalanun, Tattaya
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Tangsrirat, Worapong
An active lossy parallel type inductance simulator is proposed in this study. Only a single voltage differencing gain amplifier (VDGA) and a grounded capacitor are used in the proposed design. The realized equivalent resistance (Req) and equivalent inductance (Leq) can be adjusted electronically via the transconductance gain of the VDGA device. The influence of the non-idealities of the VDGA on the realized simulator is examined in detail. The suggested active inductance simulator is used to realize the second order voltage mode highpass filter, which is simulated using the PSPICE simulation program to ensure that it performs as expected.
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High-Input-Impedance Four-Input Single-Output Voltage-Mode Biquadratic Filter with Only VDTAs and Grounded Capacitors
(2022-01-01)
Satansup, Jetsdaporn
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Pukkalanun, Tattaya
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Tangsrirat, Worapong
This paper presents a voltage-mode universal biquadratic filter with voltage differencing transconductance amplifiers (VDTAs) as active components. The proposed filter comprises four inputs and a single output and can perform all five general biquadratic filter functions, namely lowpass, bandpass, highpass, bandstop, and allpass responses, without modifying the circuit architecture. It also offers the advantages of resistorless implementation with only two grounded capacitors, orthogonal adjustment of the natural angular frequency and the quality factor, as well as the absence of any constraint related to the values of input signals. Moreover, because the circuit contains all of the high input impedance levels, it may be cascaded without the requirement of additional buffers. The suggested filter's functioning has been validated by simulations using the PSPICE application.
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Voltage Differencing Gain Amplifier-Based Quadrature Oscillator Employing All Grounded Passive Elements
(2018-12-24)
Satansup, Jetsdaporn
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Tangsrirat, Worapong
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Surakampontorn, Wanlop
This article deals with the configuration of an electronically tunable quadrature oscillator using voltage differencing gain amplifiers (VDGAs) as active devices. The circuit employs a single grounded resistor and two grounded capacitors, which is advantageous from the monolithic integration point of view. It serves as an alternative application of VDGA device and provides the advantages of availability of two quadrature output voltages, independent control of oscillation condition and oscillation frequency by electronic means through the external biasing currents, and good various sensitivity performances. The results from PSPICE simulation program are included that demonstrate the working of the proposed circuit.
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1.5-V CMOS current multiplier/divider
(2018-06-01)
Satansup, Jetsdaporn
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Tangsrirat, Worapong
A circuit technique for designing a compact low-voltage current-mode multiplier/divider circuit in CMOS technology is presented. It is based on the use of a compact current quadratic cell able to operate at low supply voltage. The proposed circuit is designed and simulated for implementing in TSMC 0.25-μm CMOS technology with a single supply voltage of 1.5 V. Simulation results using PSPICE, accurately agreement with theoretical ones, have been provided, and also demonstrate a maximum linearity error of 1.5%, a THD less than 2% at 100 MHz, a total power consumption of 508 μW, and -3dB small-signal frequency of about 245 MHz.
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Single VDGA-based first-order allpass filter with electronically controllable passband gain
(2015-01-01)
Satansup, Jetsdaporn
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Tangsrirat, Worapong
This paper presents the realization scheme of an electronically tunable first-order voltage-mode allpass filter using a single voltage differencing gain amplifier (VDGA) as an active component, together with one floating capacitor and one grounded resistor as passive components. The proposed circuit is efficient of providing an independent electronic control of the pole frequency (ω)o) and the passband gain (HAP) through the transconductance gains of the VDGA. PSPICE simulation results, including frequency response and transient analysis, are incorporated to verify the theoretical analysis.
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Simple design technique for realizing low-voltage low-power CMOS current multiplier
(2015-01-01)
Tangjit, Jetwara
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Tangsrirat, Worapong
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Satansup, Jetsdaporn
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Surakampontorn, Wanlop
A simple circuit design technique for the realization of compact low-voltage low-power CMOS four-quadrant analog current multiplier circuit has been suggested. It is based on the use of the square-law characteristic in the NMOS current squaring function circuit operating in the saturation region. The suggested four-quadrant current multiplier circuit is designed for implementing in TSMC 0.25-μm CMOS technology with a low supply voltage of ±0.75V. To evaluate the circuit performance, the circuit has been simulated by PSPICE program. The simulation results show that the circuit has a linearity error of about 1%, a THD of 1.07% at 100 kHz, the total power consumption of 87.6 μW and -3dB bandwidth of 1.32 GHz.

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