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Subject: search.filters.subject.Analog circuits

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    Current mode automatic gain control
    (2008-01-01)
    Kasemsuwan, Varakorn
    ;
    Arthansiri, Teerawat
    This paper presents a current mode automatic gain control (AGC) using a new current mode pseudo exponential-control variable gain amplifier (VGA). The VGA is based on the 4<sup>th</sup> order Taylor's series approximation to obtain a large control range. The circuit Is designed using CMOS technology and can operate with ± 1 V supply voltages. The control range is 25 dB with the maximum error less than 0.5 dB. The power dissipation is 3 mW.
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    Simple ± 0.75 volt rail-to-rail current feedback operational amplifier and its application for oscillator
    (2007-01-01)
    Kasemsuwan, Varakorn
    ;
    Nakhlo, Weerachai
    A simple rail-to-rail CMOS current feedback operational amplifier (CFOA) is presented. The circuit is developed based on a simple complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and HSPICE is used to verify the circuit performance. The circuit operates under the supply of ± 0.75 Volt and can drive sinusoidal input of ± 0.5 Volt to a 300 Ω with the total harmonic distortion of less than 0.8% at 1 MHz. The amplifier, configured for non-inverting gain of two and a 300 Ω load provides 3-dB bandwidth of 40 MHz. The rising slew rate (SR+) and falling slew rate (SR-), for a 300 Ω // 5 pF load are 257 V/μS and 464 V/μS, respectively. The power dissipation is 2.6 mW.
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    Algorithmic ADC using current mode without DAC
    (2002-01-01)
    Tipsuwanporn, V.
    ;
    Numsomran, A.
    ;
    Chuchotsakunleot, W.
    ;
    Chuenarom, S.
    ;
    Maitreechit, S.
    This paper presents a principle of analog to digital conversion (ADC) based on a current mode circuit without DAC. For example, in this circuit the input value can be converted to a 4 bit output at each moment, and multiple output bit numbers by serial connection. In this current mode, the active current mirror and current comparators control the reference current by adjusting the W/L ratio. Its feasibility agrees with simulation results by the PSPICE program. The circuit design used a CMOS 0.5 μm process which is capable of converting 4 bits in 50 ns, with a power consumption of 0.127 mW, input current of 0-100 μA and single 3 V supply. From simulation testing, the conversion rate is faster than other methods using the same parameters.