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0.5 V Multiple-Input Fully Differential Operational Transconductance Amplifier and Its Application to a Fifth-Order Chebyshev Low-Pass Filter for Bio-Signal Processing
(2024-04-01)
Kulej, Tomasz
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Khateb, Fabian
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Kumngern, Montree
This paper presents a multiple-input fully differential operational transconductance amplifier (MI-FD OTA) with very low power consumption. To obtain a differential MOS pair with minimum supply voltage and minimum power consumption, the multiple-input bulk-driven MOS transistor operating in the subthreshold region is used. To show the advantage of the MI-FD OTA, a fifth-order Chebyshev filter was used to realize a low-pass filter capable of operating with a supply voltage of 0.5 V and consuming 60 nW at a nominal setup current of 3 nA. The proposed filter uses five MI-FD OTAs and five capacitors. The total harmonic distortion (THD) was 0.97% for a rail-to-rail sinusoidal input signal. The MI-FD OTA and the filter application were designed and simulated in the Cadence environment using a 0.18 µm CMOS process from TSMC. The robustness of the design was confirmed by Monte Carlo analysis and process, voltage, and temperature corner analysis.
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31.3 nW, 0.5 V Bulk-Driven OTA for Biosignal Processing
(2023-01-01)
Kumngern, Montree
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Kulej, Tomasz
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Khateb, Fabian
This paper presents a new extremely low-voltage low-power bulk-driven (BD) operational transconductance amplifier (OTA) realized for low frequency biosignal processing. The CMOS structure of the OTA utilizes bulk-driven and self-cascode techniques in the subthreshold region, supporting the operation with the supply voltage ( V- DD ) as the threshold voltage ( VTH ) of a single MOS transistor, i.e., V DD = V TH = 0.5 V, while offering nano power consumption (31.3 nW for 15 nA nominal setting current). Using the extremely low-voltage and low-power OTA in biosignal processing enables extending the lifetime of applications that are powered by battery or energy harvesting sources. The OTA has a 54.7 dB low frequency gain, 6.18 kHz gain bandwidth and 75° phase margin at 15 pF load capacitance. The proposed OTA has been used to realize a bandpass filter (BPF) with adjustable gain for electrocardiogram (ECG) signal processing. The higher cutoff frequency of the BPF is adjustable electronically by a setting current and the BPF's gain can be adjusted by capacitors value. The total harmonic distortion (THD) of the BPF is -53.56 dB, the input integrated input-referred voltage noise is 17.9 V rms , the common mode rejection ratio (CMRR) is 75 dB and the power supply rejection ratio (PSRR) is 87.7 dB. The BPF was designed in the Cadence program using 0.18 m CMOS technology from TSMC. The simulation results agree with the presented theory.
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0.3-V Nanopower Biopotential Low-Pass Filter
(2020-01-01)
Kulej, Tomasz
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Khateb, Fabian
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Kumngern, Montree
This paper presents a compact power-efficient CMOS fourth-order low-pass filter suitable for electrocardiogram (ECG) acquisition systems. The CMOS structure of the proposed filter utilize the bulk-driven technique and operates in subthreshold region to achieve extremely low-voltage supply (0.3V) and nanopower consumption (0.676 nW) for cut-off frequency of 100 Hz. The filter was designed and simulated using 0.18μm CMOS TSMC technology. The total input referred noise of the filter is 87μ Vrms and the dynamic range is 58.1 dB. The filter offers the best figure of merit of 2.91× 10-14 J, the lowest power consumption and voltage supply, compared with the previous state-of-the-art nanowatt filter designs.
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Low-voltage bulk-driven QFG-regulated self-cascode super MOS transistor
(2016-09-06)
Thongleam, Thawatchai
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Suadet, Apirak
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Kasemsuwan, Varakorn
A bulk-driven super MOS transistor (BD-SMT) for low voltage operation is presented. The proposed transistor achieves a high effective transconductance (G<inf>m(eff)</inf>), high effective drain impedance (R<inf>D(eff)</inf>) and low effective source impedance (R<inf>S(eff)</inf>). BD-SMT is designed based on regulated self-cascode and negative feedback techniques. The transistor been designed using a 0.18 μm CMOS technology and operated from a 0.4 V supply with a static power consumption of 12 μW. The simulation results showed higher G<inf>m(eff)</inf>, larger R<inf>D(eff)</inf> and smaller R<inf>S(eff)</inf> as compared to those of simple bulk-driven MOS transistor.
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A compact class-AB bulk-driven quasi-floating gate current mirror for low voltage applications
(2013-12-31)
Suadet, Apirak
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Kasemsuwan, Varakorn
A compact class-AB bulk-driven quasi-floating gate current mirror is proposed. The circuit is based on an active class-A current mirror using bulk-driven quasi-floating gate (BD-QFG) MOS transistors and low voltage bulk-input pseudo-differential amplifier. The circuit can operate from a supply voltage as low as V<inf>T</inf>+V<inf>DSAT</inf>. The performance of the circuit is verified by SPECTRE, using a standard 0.18 μm CMOS process with a 0.5 V supply voltage. The circuit demonstrates low input impedance (934 Ω) and relatively high output impedance (1.13 MΩ). The circuit can drive the output current 8 times larger than the quiescent current. The power dissipation under quiescent condition is 8.2 μW. © 2013 IEEE.
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Low-voltage high gain, high CMRR and rail-to-rail bulk-driven Op-amp using feedforward technique
(2013-12-31)
Thongleam, Thawatchai
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Suwansawang, Sopapun
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Kasensuwan, Varakorn
A low voltage fully differential CMOS Op-amp is presented in this paper. The input stage of the circuit is designed using bulk-driven transistors while the output stage are connected in the class AB operation using by QFG transistors techniques. The auxiliary transconductance feedforward circuit are employed to circuit operate high gain and high CMRR. The proposed amplifier is designed using 0.18 μm CMOS technology, and verify by HSPICE. The simulation results show rail-to-rail input and output swings. The open-loop gain and phase margin are 70.6 dB and 55<sup>o</sup>. Eventually, the gain-bandwidth product, the CMRR, and the power consumption are 31.7 MHz (C<inf>L</inf>=20 pF), 158.8 dB (at 1 kHz) and 220.35 μW, respectively. © 2013 IEEE.
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A 0.6 volt class-AB CMOS voltage follower with bulk-driven quasi-floating gate super source follower
(2012-10-02)
Wangtaphan, Skawrat
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Kasemsuwan, Varakorn
This paper presents a design of 0.6 V class-AB voltage follower (VF) using 0.13 μm CMOS technology. The follower is developed based on the super source follower (SSF) using bulk-driven and quasi-floating gate (QFG) techniques. The proposed VF can operate at low voltage without DC level shift between the input and output terminals. The simulation results show the total harmonic of 0.3 % for an input/output voltage of 0.18 V <inf>pp</inf> at 100 kHz (R <inf>L</inf>//C <inf>L</inf>=5 kΩ//100 pF). The power dissipation is found to be 38 μW. © 2012 IEEE.
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0.8-μW CMOS bulk-driven linear operational transconductance amplifier in 0.35-μm technology
(2010-12-01)
Yodtean, Apiradee
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Isarasena, Pasin
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Thanachayanont, Apinunt
This paper proposes a low-voltage linear operational transconductance amplifier (OTA) in a 0.35-μm CMOS process. The proposed OTA employs a bulk-driven differential input stage with resistive source degeneration and the flipped-voltage follower topology to achieve high linearity under low power supply voltage. The proposed OTA dissipates 0.8 μW from a single 0.8-V power supply voltage. Simulation results with showed that a linear differential input voltage range of 470 mV was achieved with less than 1% total harmonic distortion. © 2010 IEEE.

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