Now showing 1 - 2 of 2
  • Some of the metrics are blocked by your 
    Item type:Publication,
    Improved speed rate in current mode algorithmic ADC
    (2005-12-01)
    Tipsuwarnpron, V.
    ;
    ;
    Chuchotsakunleot, W.
    ;
    Maitreechit, S.
    A low power current-mode analog to digital converter suitable for equipment are required low voltage, low power (ADC). It uses a quartzite level with current injection technique to increase the speed of current mirrors. And this method to reduce the required input signal for a given range and higher operating speeds. In this paper, the feasibility of current-mode algorithmic ADC is demonstrated and advantages of various 2 techniques for use in the converters are considered. Experimental results for 4-bits algorithmic ADC using a 0.8 μm CMOS technology are reported, including power consumption.
  • Some of the metrics are blocked by your 
    Item type:Publication,
    Half flash ADC 4-bit without DAC
    (2001-12-01)
    Tipsuwanporn, V.
    ;
    Chuenarom, S.
    ;
    Junkrob, N.
    ;
    Chuchotsakunleot, W.
    ;
    This paper presents a principle of parallel Analog To Digital Conversion (ADC) based on current mode HALF FLASH ADC. This circuit can be converted to 4-bit output at each moment, and multiple output bit numbers by serial connection. A current mode, the active current mirror and current comparators that controlled reference current by W/L ratio, has been used. Its feasibility agrees with simulation results of PSPICE program. The circuit design used CMOS 0.8 μm which is capable to convert 4 -bit in 50 nS, power consumed 0.127 mW, input current 0-100 μA and single 3V supply. From simulation testing, the conversion rate is faster than other method.