Jangwanitlert, Anuwat

Preferred name

Alternative Name

Jangwanitlert, A.

Main Affiliation

School of Engineering

anuwat.ja@kmitl.ac.th

Now showing 1 - 8 of 8

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An Improved Three-Level Full-Bridge Soft-Switching DC/DC Converter with Wide Load Range for Energy Storage System
(2024-01-01)
Sanajit, Narongrit
;
Jangwanitlert, Anuwat
This article aims to present an improved three-level full-bridge (3L-FB) DC/DC converter in which all switches can operate under soft-switching conditions for a wide load range. It is suitable for applications with high input voltage and input power. The proposed circuit has some interesting features: the voltage across the switch is only half of the input voltage. The phase-shifted switching pattern is used for the output voltage control. Furthermore, auxiliary inductors are added to the circuit to verify that the main switches are operating under the soft switching condition for a wide load range, particularly light load scenarios. And clamping diodes can also facilitate in achieving the soft switching condition, leading to improved performance by lowering the loss of semiconductor devices in the circuit. The proposed three-level full-bridge (3L-FB) DC/DC converter circuit has been designed and simulated, and the results of the prototype test at 2.5 kW of output power rating have been analyzed to confirm the performance of the proposed circuit.
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Evaluation of a three-phase three-level ZVZCS DC-DC converter using phase-shift PWM strategy
(2017-09-01)
Kongwirat, Thammachat
;
Jangwanitlert, Anuwat
This paper presents the evaluation of a three-phase three-level DC-DC converter which achieves the soft switching condition for all switches in the circuit and uses the phase-shift PWM strategy to adjust electric power at the output side. According to the analysis, the operation modes can be categorized into two cases: in the first case, where the phase shift angle is less than 120 degrees and in the second case, where the phase shift angle is more than 120 degrees. The outer switches of the circuit operate under ZVS condition and the inner switches operate under ZVZCS condition. It has been discovered that under ZCS condition of the inner switches, when the blocking capacitors decrease, they make the voltage across the blocking capacitor higher so the current reduce rapidly. A three-phase three-level DC-DC converter has a maximum efficiency of 93.5% when its load is of 5.7 kW. The results from the experiment have been compared to the results obtained by the MATLAB® simulator in order to confirm the validity of the proposed converter.
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Techniques of Maximum Power Point Tracking by Using Perturb and Observe and Lookup Table Methodologies
(2025-01-01)
Lapkitticharoenchai, Yuttikarn
;
Jangwanitlert, Anuwat
– In the typical Photovoltaic (PV) system, the Perturb and Observe (P&O) technique is the algorithm that is used for tracking the Maximum Power Point (MPP). It enables the photovoltaic (PV) panel to reach the maximum power output. However, there are two main existing problems which are the slow speed of the P&O, and an oscillation of power around MPP. The problems lead to a reduction of the power output of the PV panel. This paper presents a new hybrid methodology for a faster Maximum Power Point Tracking (MPPT) application. The proposed method consists of the Lookup Table, together with the P&O techniques. The results show that the Lookup Table employs measured values of an irradiance, a temperature, and a Duty Cycle to achieve MPPT precisely. Consequently, the Lookup Table’s tracking speed is significantly faster than P&O and the oscillation of tracking power is eliminated. Moreover, the new hybrid methodology also uses P&O to record irradiance, temperature, and Duty Cycle data into the table. Once sufficient data are collected and under defined the conditions, the system automatically select to the Lookup Table for operation.
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Evaluation of PWM strategies based on practical findings and experimental facts for VSI-fed induction motors
(1998-12-01)
Kinnares, V.
;
Jangwanitlert, A.
;
Potivejkul, S.
This paper is concerned with the evaluation of PWM strategies based on practical findings and experimental facts for VSI fed induction motors. The measured harmonic loss factor curve for given conditions is used for the loss prediction. The comparison of harmonic losses for various PWM schemes has been made. As a result, the better understanding of PWM characteristics influencing harmonic machine losses is achieved. This will be useful for choosing the PWM schemes and parameters suitable for applications.
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An improved asymmetric half-bridge converter for switched reluctance motor in low-speed operation with current regulated mode
(2015-01-01)
Woothipatanapan, Sakhon
;
Chancharoensook, Phop
;
Jangwanitlert, Anuwat
This study presents a novel method for reducing the switching losses of an asymmetric half-bridge converter for a three-phase, 12/8 switched reluctance motor operated in low speed. In particular, this study aims to reduce the switching-off losses of chopping switches in the converter when operated in the current regulated mode (chopping mode). The proposed method uses the mixed parallel operation of IGBT (chopping switch) and MOSFET (auxiliary switch). MOSFET is precisely controlled to momentarily conduct prior to the turn-off interval of the IGBT. Consequently, the voltage across the switches is clamped to approximately zero, substantially decreasing the turn-off switching losses. The analytical expressions of power losses are extensively elaborated. Compared with the conventional asymmetric half-bridge converter, the modified converter can effectively minimize the switching losses. Therefore, the efficiency of the converter is eventually improved. Computer simulation and experimental results confirm the effectiveness of the proposed technique.
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Implementation of 48 v series-input parallel-output zero-voltage switching converter using secondary resonant technique
(2021-01-01)
Meesrisuk, Watanyu
;
Jangwanitlert, Anuwat
This research paper aims to propose a series-input parallel-output zero-voltage switching converter (SIPO ZVS converter) by using the secondary resonant technique for achieving the Zero-Voltage-Switching (ZVS) condition for all the main switching devices in the proposed converter. Two half-bridge converters are applied for the proposed converter, connected in series at the input side and in parallel at the output side of the proposed converter (SIPO technique). By using the SIPO technique, the voltage stress on the main switching devices is decreased to be a half of the input voltage or V<inf>dc</inf>/2. This leads to the reduction of rated voltage of main switching devices. The rated current of the rectifier diodes is also decreased because of the current sharing behavior. Moreover, the phase-shifted control method is analyzed in order to comprehend the impact on the ripple current at the output side. Finally, the prototype of the proposed converter has been designed, built, and tested in order to confirm the effectiveness of the proposed converter.
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An improved asymmetric half-bridge converter for switched reluctance motor in low-speed operation with current regulated mode
(2015-10-01)
Woothipatanapan, Sakhon
;
Chancharoensook, Phop
;
Jangwanitlert, Anuwat
This study presents a novel method for reducing the switching losses of an asymmetric half-bridge converter for a three-phase, 12/8 switched reluctance motor operated in low speed. In particular, this study aims to reduce the switching-off losses of chopping switches in the converter when operated in the current regulated mode (chopping mode). The proposed method uses the mixed parallel operation of IGBT (chopping switch) and MOSFET (auxiliary switch). MOSFET is precisely controlled to momentarily conduct prior to the turn-off interval of the IGBT. Consequently, the voltage across the switches is clamped to approximately zero, substantially decreasing the turn-off switching losses. The analytical expressions of power losses are extensively elaborated. Compared with the conventional asymmetric half-bridge converter, the modified converter can effectively minimize the switching losses. Therefore, the efficiency of the converter is eventually improved. Computer simulation and experimental results confirm the effectiveness of the proposed technique.
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Implementation of two-output three-level series-resonant inverter for induction melting application
(2018-01-12)
Meesrisuk, Watanyu
;
Jangwanitlert, Anuwat
;
Suwan-Ngam, Warachart
This study aims to present a two-output three-level series-resonant inverter together with an implementation and experiments for an induction melting application. A three-level circuit is applied for each branch of inverter in order to decrease the voltage stress on switching devices. A phase-shifted pulse-width modulation (PSPWM) with variable frequency control is applied for providing and maintaining a zero-voltage switching condition over a wide load range. In addition, the PSPWM could provide symmetrical output voltage and current waveforms that result in decreasing the THD<inf>v</inf> and THD<inf>i</inf> of output waveforms and harmonic losses of high-frequency transformer cores comparing to other PWM schemes. Finally, the prototype was designed, built, and tested to verify the consistency between the experimental results and theories of the proposed inverter.

Jangwanitlert, Anuwat

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