Vichienchom, Kasin
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Item type:Publication, A 1 GHz CMOS analog equalizer for perpendicular magnetic recording(2010-12-01) ;Meksiri, Sukarasut; Wilairat, DechaThis paper describes the design of a CMOS analog discrete-time equalizer for perpendicular magnetic recording (PMR) read channel. In this design the structure of analog FIR filter that places rotating switch matrix between DAC and multiplier has been proposed. It reduces an accumulative switching error in analog samples due to rotating switch matrix. A 7-tap filter circuit based on GPR2 target was designed and simulated using TSMC 0.18 μm CMOS process parameters. Simulation results show good agreement with the results of the system level simulation. At 1 GHz sampling frequency the equalizer dissipates 1.5 mW. ©2010 IEEE. - Some of the metrics are blocked by yourconsent settings
Item type:Publication, Target and equalizer design for perpendicular magnetic recording at 1 Tb/in2(2008-12-01) ;Meksiri, Sukarasut ;Wangtaphan, SkawratThis paper described the design of generalized partial-response (GPR) target and its corresponding equalizer for perpendicular magnetic recording (PMR) read channel with jitter noise. In this design the readback signal model uses transition response that its parameter is calculated based on media properties and reader head geometry specifically designed for 1 Tb/in <sup>2</sup> areal density. The GPR targets with various lengths are designed using minimum mean-squared error (MMSE) approach. The simulation results show that the BER performance of the system degrades as the ratio of jitter noise power to total noise power increases. According to these results GPR2 with 7-tap equalizer offers the optimal tradeoff between system performance and circuit implementation. copyright © 2008 IEICE.1
