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Development of High Efficient LDPC Encoder for Deep Space Applications
Author(s)
Date Issued
January 1, 2023
Type
Conference Paper
Abstract
In this paper, we present the design and implementation of a high efficient low-density parity-check (LDPC) encoder for deep space applications. The proposed encoder utilizes the generator matrix of CCSDS LDPC codes to simplify the encoding process and reduces the complexity of hardware implementation. The proposed encoder has two types. The first type aims to design a low-complexity architecture and flexibility. The second type presents high throughput architecture, allowing the user to choose the appropriate type according to their usage condition. The results of FPGA synthesis show that the proposed LDPC encoders achieve flexibility, low complexity, and high throughput.
Citation
2023 International Technical Conference on Circuits Systems Computers and Communications Itc Cscc 2023, 2023