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Thermally Assisted Nonvolatile Memory in Monolayer MoS2 Transistors
Author(s)
He, G.
Kwan, C. P.
Lee, Y. H.
Nathawat, J.
Matsunaga, M.
Higuchi, A.
Yamanaka, T.
Aoki, N.
Gong, Y.
Zhang, X.
Vajtai, R.
Ajayan, P. M.
Bird, J. P.
Date Issued
October 12, 2016
Type
Article
Abstract
We demonstrate a novel form of thermally-assisted hysteresis in the transfer curves of monolayer MoS2 FETs, characterized by the appearance of a large gate-voltage window and distinct current levels that differ by a factor of ∼102. The hysteresis emerges for temperatures in excess of 400 K and, from studies in which the gate-voltage sweep parameters are varied, appears to be related to charge injection into the SiO2 gate dielectric. The thermally-assisted memory is strongly suppressed in equivalent measurements performed on bilayer transistors, suggesting that weak screening in the monolayer system plays a vital role in generating its strongly sensitive response to the charge-injection process. By exploiting the full features of the hysteretic transfer curves, programmable memory operation is demonstrated. The essential principles demonstrated here point the way to a new class of thermally assisted memories based on atomically thin two-dimensional semiconductors.
Citation
Nano Letters, 16(10), 6445-6451, 2016