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A CMOS voltage-controlled floating resistance circuit with temperature compensated
Author(s)
Date Issued
December 1, 2005
Type
Conference Paper
Abstract
A CMOS Voltage-Controlled Floating Resistance (VCFR) with a new approach for non-linearity terms cancellation and temperature compensated technique is presented. The achieved circuit uses 17 MOS transistors that operated in ohmic region and saturation region. It consists of the voltage attenuator, voltage subtraction and voltage inverting circuits. These circuits performed as a voltage dependent source that bias to an ohmic transistor. The nonlinearity terms and threshold voltage are cancelled in order to a linearity and temperature effect minimization. A first-order low-pass filter with tunable a cut-off frequency is proposed as an application for confirmed a realistic VCFR. The characteristics are including a high linearity and the temperature compensation. The results are carried out by PSpice. © 2005 IEEE.
Citation
Iscit 2005 International Symposium on Communications and Information Technologies 2005 Proceedings, II, 254-257, 2005