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A linearized source-couple pair transconductor using a low-voltage square root circuit
Author(s)
Ngamkham, W.
Kiatwarin, N.
Narksap, W.
Sangpisit, W.
Kiranon, W.
Date Issued
October 6, 2008
Type
Conference Paper
Abstract
This paper presents a CMOS transconductor linearization by connecting square-rooter to a source couple pair circuit. A novel square-rooting circuit is proposed for low voltage operation. The proposed transconductance circuit is compact and consumes lower quiescent power, compared with the existing transconductors using the same realization technique. The circuit performances verification by PSPICE simulations show good results as expected. © 2008 IEEE.
Citation
5th International Conference on Electrical Engineering Electronics Computer Telecommunications and Information Technology Ecti Con 2008, 2, 701-704, 2008