A CMOS median filter circuit design

Noisuwan, Chartchai; Nakasuwan, Jintana; Knobnob, Boonying; Chivapreecha, Sorawat; Dejhan, Kobchai

doi:10.1109/ISCIT.2006.339946

A CMOS median filter circuit design

Author(s)

Noisuwan, Chartchai

Nakasuwan, Jintana

Knobnob, Boonying

Chivapreecha, Sorawat

Dejhan, Kobchai

Date Issued

December 1, 2006

Type

Conference Paper

DOI

10.1109/ISCIT.2006.339946

Abstract

This paper proposes a median filter circuit design, which the operations are in current mode and based on CMOS technology. Its structure consists of three main parts, the first part is current average circuit, second part is current absolute value circuit, and third part is current minimum circuit. The results of this circuit can be shown using the PSpice simulation program to demonstrate the performances of this circuit. © 2006 IEEE.

Citation

2006 International Symposium on Communications and Information Technologies Iscit, 1089-1092, 2006