A 32 bits architecture for an AES system

Abstract

This paper describes a compact 32 bits architecture developed for the Rijndael ciphering/decyphering system. The implementation is complied with NIST Advanced Encryption standard. The design processes 128-bit block data with 128-bit key. For the area-saving implementation, the field inversion block and the key scheduling circuits are shared by both the encryption and decryption process.