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An efficient algorithm for circuit partitioning
Author(s)
Yodtean, Apiradee
Choomchuay, Somsak
Suzuki, Yasoji
Date Issued
December 1, 1999
Type
Conference Paper
Abstract
This paper describes an improved simulated annealing algorithm applied for graph balanced bipartitioning problem, in particular for circuit partitioning problem. The new algorithm has incorporated the idea and procedure required in a genetic algorithm Experiment results on industrial benchmark circuits show that the proposed algorithm is superior to a conventional simulated annealing algorithm in both cut cost and run time.
Citation
International Symposium on IC Technology Systems and Applications, 8, 359-362, 1999