Implementation of vedic multiplier technique on multicore processor

Tuwanuti, Panwit; Thongbai, Nopphagaw

doi:10.1109/TENCON.2014.7022325

Implementation of vedic multiplier technique on multicore processor

Author(s)

Tuwanuti, Panwit

Thongbai, Nopphagaw

Date Issued

January 26, 2015

Type

Conference Paper

DOI

10.1109/TENCON.2014.7022325

Abstract

This article describes about the mathematic parallel process idea by using Vedic Multiplier techniques. Vedic mathematics is an ancient India that one type of quick trick for calculating that most popular and worldwide acceptation in tutor school. Vedic can apply to use in information technology, science field. They have many researches that used apply Vedic mathematics to accelerate effective of computation. In this paper using Urdhva Tiyakbhyam Sutra and Nikhilam Sutra with both to implement on Multi core processing with MPICH2 (MPI protocol). Urdhva Tiyakbhyam Sutra uses to splitting long digits to sub block for distributing to some other core. Nikhilam Sutra is used for reduce value to improve some of computation effectively.

Citation

IEEE Region 10 Annual International Conference Proceedings TENCON, 2015-January, 2015

Subjects

MPI implementation

Parallel Multiplier

Vedic Multiplier