Single low-supply and low-distortion CMOS Analog Multiplier

Prommee, Pipat; Somdunyakanok, Montri; Angkaew, Krit; Jodtang, Arkhom; Dejhan, Kobchai

doi:10.1109/ISCIT.2005.1566843

Single low-supply and low-distortion CMOS Analog Multiplier

Author(s)

Prommee, Pipat

Somdunyakanok, Montri

Angkaew, Krit

Jodtang, Arkhom

Dejhan, Kobchai

Date Issued

December 1, 2005

Type

Conference Paper

DOI

10.1109/ISCIT.2005.1566843

Abstract

A single low-supply CMOS Analog Multiplier based upon ohmic region of MOS transistors is presented. This paper describes a method to force the drain-source voltage (VDS) of MOS transistors to operate in ohmic region. The achieved circuit can be used a single low-power supply. The complete circuit contains 20 transistors and 8 current sources using a low-power supply +1.5 volts. This circuit has high performance with very high-linearity and low-distortion. The achieved input dynamic range operation is ±400mV, the linearity error is smaller than 0.1% and total harmonic distortion is smaller than 0.25% for input range 800mVp-p. © 2005 IEEE.

Citation

Iscit 2005 International Symposium on Communications and Information Technologies 2005 Proceedings, II, 242-245, 2005

Subjects

Analog Multiplier

CMOS Analog Circuit

Low-Supply