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  4. Design and implementation multilevel inverter for 3φ induction motor speed control with RBM chopper technique embedded on FPGA
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Design and implementation multilevel inverter for 3φ induction motor speed control with RBM chopper technique embedded on FPGA

Author(s)
Tipsuwanporn, V.
Keanthong, K.
Charean, A.
Runghimmawan, T.
Date Issued
January 1, 2006
Type
Conference Paper
DOI
10.1109/ICPST.2006.321919
Abstract
This paper introduces on designing of Regular-based Binary Multiplier: RBM signal embedded on Field Programmable Gate Array: FPGA, which control induction motor speed. Various form of 8-bit RBM signal are generated and choppered with the multi level -inverter output voltage whose switching angle is provided for determining amplitude of fundamental frequency and eliminating unrequired low-order harmonics. Objectives of this switching technique is improvement of the inverter output signal in term of total harmonic distortion voltage reduction (%THD) while controlling the motor. Such motor's efficiency and performance are improved while voltage to frequency ratio is maintained constantly for stable torque during control. © 2006 IEEE.
Citation
2006 International Conference on Power System Technology Powercon2006, 2006
Subjects

3φ induction machines...

FPGA

Harmonic distortion

Multi level inverter

RBM switching techniq...

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