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Performance improvement for arithmetic coder using parallel symbol encoding in JPEG2000
Author(s)
Noikaew, Nopphol
Date Issued
October 6, 2008
Type
Conference Paper
Abstract
JPEG2000 image compression standard is designed to support a wide rage of applications. However, its use is restricted since its implementation requires high hardware cost. Bit Plane Coder (BPC) and arithmetic coder are the main resource intensive components, which indicate the overall throughput of JPEG2000 encoder. Usually, the regular operation of the arithmetic coder is sequential, which can process only one symbol at a time. However, the bit-plane coding can generate more than one symbol per clock cycle. Consequently, the coding speed will be limited and bottlenecked at the interface between the output of the bit-plane coding and the input of the arithmetic coder. Therefore, in this paper, the parallel symbol encoding is proposed to improve the performance of the JPEG2000 arithmetic coder. The encoding performance is enhanced through the use of the proposed prediction process of the upper bound value, the lower bound and the index value. Since the prediction processes of the upper bound and lower bound values are quite similar, they can be done simultaneously with the similar prediction condition. As a result, the proposed arithmetic coder architecture can process dual symbols per clock cycle at the speed greater than 100 MHz with the throughput greater than 60 Msymbols/sec. © 2008 IEEE.
Citation
5th International Conference on Electrical Engineering Electronics Computer Telecommunications and Information Technology Ecti Con 2008, 2, 1073-1076, 2008