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Independent BRM multi patterns with VFC
Author(s)
Tipsuwanporn, V.
Tirasesth, K.
Sattho, U.
Witheephanich, K.
Chuenarom, S.
Date Issued
December 1, 2000
Type
Conference Paper
Abstract
In this paper voltage-to-frequency conversion (VFC) circuit with Binary Rate Multipliers (BRM) output is presented. We first analyze spectrum value and percentage of Binary Bit Rate (BBR) power then reject the repeated power values, and select only one BBR signal to construct BRM by linear combination. A VFC design with 1 to 5 volts (Vin) and ±2.5 volts (Vout) can generate BRM pattern (0 Hz - 39.0625 kHz) in sine, triangular, saw-tooth and square waveform. The average value of VFC output signal is fedback to input of the VFC in order to stabilize pattern for BRM transmission. The output patterns and frequencies can be controlled either independently or simultaneously.
Citation
IEEE Asia Pacific Conference on Circuits and Systems Proceedings, 622-625, 2000