Design and implementation of a 100-MHz CMOS direct digital synthesiser with a 10-bit on-chip digital-to-analog converter

Thanachayanont, A.; Meenakarn, C.; Thongphuak, T.; Sangnak, W.

Design and implementation of a 100-MHz CMOS direct digital synthesiser with a 10-bit on-chip digital-to-analog converter

Author(s)

Thanachayanont, A.

Meenakarn, C.

Thongphuak, T.

Sangnak, W.

Date Issued

December 1, 2001

Type

Conference Paper

Abstract

This paper presents the design and implementation of a CMOS integrated direct digital synthesiser (DDS) with a 10-bit on-chip digital-to-analog converter (DAC) using an n-well single-poly triple-metal 0.5-μm CMOS technology. Main features of the DDS chip include maximum clock frequency of 100-MHz at 3.3-V single supply voltage, 32-bit frequency tuning word resolution, 12-bit phase tuning word resolution, and an on-chip 10-bit DAC. The chip provides sinusoidal, triangular, sawtooth, square, and random waveforms with phase and frequency modulation, and power-down function. The complete chip occupies 10-mm² die area and dissipates 0.4 W at 100-MHz clock frequency.

Citation

International Symposium on IC Technology Systems and Applications, 9, 55-58, 2001