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A Versatile CMOS Analog Multiplier
Author(s)
Chaisayun, Ittipong
Dejhan, Kobchai
Date Issued
January 1, 2003
Type
Article
Abstract
This paper describes a novel four-quadrant analog multiplier. It is comprised of two mixed signal circuits, a voltage adder circuit, a voltage divider circuit and a basic multiplier, Its major advantages over the other analog multipliers are: this design has single ended inputs, the geometry of all CMOS transistors are equal, and its output can be the product of two signal currents, the product of two signal voltages, or the product of a signal current and a signal voltage. Second-order effects are analyzed, and the experimental and simulative results that confirm the theoretical analysis are carried out.
Citation
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, E86-A(5), 1225-1232, 2003