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A CMOS-based algorithmic ADC

Author(s)
Arayawat, S.
Chaikla, A.
Petcmaneelumka, W.
Riewruja, V.
Julsereewong, P.
Trisuwannawat, T.
Date Issued
January 1, 2005
Type
Conference Paper
DOI
10.1109/EDSSC.2005.1635361
Abstract
This paper presents a one-bit cell of reverse Gray-code algorithmic analog-to-digital converter, which operates in the current mode. The realization method is simple, small in size, and suitable for fabrication using CMOS technology. The design strategy is based on the MOS bias at the edge of conduction to provide a high-speed operation and a low distortion in the transfer characteristic. The N-bit resolution can be achieved by cascading of the N proposed one-bit cells. PSPICE simulation results verifying the proposed circuit performances are agreed with the expected value. ©2005 IEEE.
Citation
2005 IEEE Conference on Electron Devices and Solid State Circuits Edssc, 661-664, 2005
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