Realization of Lossy Parallel Inductance Simulator Using Single VDGA and a Grounded Capacitor

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dc.contributor.authorJetsdaporn Satansup
dc.contributor.authorNatchanai Roongmuanpha
dc.contributor.authorTattaya Pukkalanun
dc.contributor.authorWorapong Tangsrirat
dc.date.accessioned2025-07-21T06:06:46Z
dc.date.issued2022-03-09
dc.identifier.doi10.1109/ieecon53204.2022.9741626
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/11183
dc.subjectEquivalent series inductance
dc.subjectLossy compression
dc.subjectTransconductance
dc.subjectRealization (probability)
dc.subject.classificationAnalog and Mixed-Signal Circuit Design
dc.titleRealization of Lossy Parallel Inductance Simulator Using Single VDGA and a Grounded Capacitor
dc.typeArticle

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