A FPGA design of AES core architecture for portable hard disk
| dc.contributor.author | Khanob Thongkhome | |
| dc.contributor.author | Chalermwat Thanavijitpun | |
| dc.contributor.author | Somsak Choomchuay | |
| dc.date.accessioned | 2025-07-21T05:52:02Z | |
| dc.date.issued | 2011-05-01 | |
| dc.identifier.doi | 10.1109/jcsse.2011.5930124 | |
| dc.identifier.uri | https://dspace.kmitl.ac.th/handle/123456789/2951 | |
| dc.subject | AES implementations | |
| dc.subject | Critical path method | |
| dc.subject | Clock rate | |
| dc.subject.classification | Cryptographic Implementations and Security | |
| dc.title | A FPGA design of AES core architecture for portable hard disk | |
| dc.type | Article |