Design of Phase-Locked Loop using Special Analog Multipliers and Voltage Buffers: Demodulation of Transposed Signals from Sensors

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dc.contributor.authorMarek Svoboda
dc.contributor.authorRoman Sotner
dc.contributor.authorLadislav Polak
dc.contributor.authorJan Jerabek
dc.contributor.authorWinai Jaikla
dc.contributor.authorDarius Andriukaitis
dc.date.accessioned2025-07-21T06:10:35Z
dc.date.issued2024-01-01
dc.identifier.doi10.1109/tim.2024.3427752
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/13195
dc.subject.classificationAdvancements in PLL and VCO Technologies
dc.titleDesign of Phase-Locked Loop using Special Analog Multipliers and Voltage Buffers: Demodulation of Transposed Signals from Sensors
dc.typeArticle

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