A 0.5 V quasi-floating gate self-cascode DTMOS current-mode precision full-wave rectifier

Simple item page
dc.contributor.authorMitwong, Hanphon
dc.contributor.authorKasemsuwan, Varakorn
dc.date.accessioned2026-08-06T10:04:53Z
dc.date.available2026-08-06T10:04:53Z
dc.date.issued2012-10-02
dc.description.abstractThis paper presents a 0.5 V quasi-floating gate self-cascode DTMOS current-mode precision full-wave rectifiers (PFWR). The circuit is designed based on improved Wilson current mirrors. All MOS transistors are biased on the edge of conduction, enabling the circuit to operate at low voltage with low power consumption. Negative feedback mechanism of the Wilson current mirror and cross coupling techniques have been employed to reduce the input impedance. Spectre is used to perform the simulation and the results show the frequency of operation as high as 100 MHz using a standard 0.13 μm CMOS technology. The mismatch between the input and rectifier's output is 0.24% for an input current of ±100 μA. The DC transfer characteristic shows good linearity, very sharp corner at zero crossing point and good symmetry during positive and negative input cycle, while power dissipation is 570 nW © 2012 IEEE.
dc.identifier.citation2012 9th International Conference on Electrical Engineering Electronics Computer Telecommunications and Information Technology Ecti Con 2012, 2012
dc.identifier.doi10.1109/ECTICon.2012.6254282
dc.identifier.other2-s2.0-84866749139
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/4381
dc.source2012 9th International Conference on Electrical Engineering Electronics Computer Telecommunications and Information Technology Ecti Con 2012
dc.subjectfull-wave
dc.subjectlow power
dc.subjectlow voltage
dc.subjectrectifier
dc.titleA 0.5 V quasi-floating gate self-cascode DTMOS current-mode precision full-wave rectifier
dc.typeConference Paper

Files

Collections

Research