Fine-tuning of wave-pipelines on FPGAs developed by the RTL design
| dc.contributor.author | Tomoaki Sato | |
| dc.contributor.author | Sorawat Chivapreecha | |
| dc.contributor.author | Phichet Moungnoul | |
| dc.date.accessioned | 2025-07-21T05:55:56Z | |
| dc.date.issued | 2015-06-01 | |
| dc.identifier.doi | 10.1109/ecticon.2015.7207067 | |
| dc.identifier.uri | https://dspace.kmitl.ac.th/handle/123456789/5195 | |
| dc.subject | Logic block | |
| dc.subject.classification | Embedded Systems Design Techniques | |
| dc.title | Fine-tuning of wave-pipelines on FPGAs developed by the RTL design | |
| dc.type | Article |