Effects of Annealing Process on the Electrical Properties of MEMS Capacitive Microphone
| dc.contributor.author | Jantawong, Jirawat | |
| dc.contributor.author | Leepattarapongpan, Chana | |
| dc.contributor.author | Chaowicharat, Ekalak | |
| dc.contributor.author | Jeamsaksiri, Wutthinan | |
| dc.contributor.author | Austin, Anu | |
| dc.contributor.author | Sooriakumar, Kathirgamasundaram | |
| dc.contributor.author | Niemcharoen, Surasak | |
| dc.date.accessioned | 2026-08-06T10:20:18Z | |
| dc.date.available | 2026-08-06T10:20:18Z | |
| dc.date.issued | 2018-07-02 | |
| dc.description.abstract | In this paper, the effects of annealing temperature after pre-bonding device wafer and cover wafer during wafer fusion bonding process on the electrical properties of MEMS-based capacitive microphone with 0.53 μm thick poly-Si membrane were investigated. By the annealing in N2 ambient (14 SLM) at 900°C for 30 min, the device exhibited capacitance of 2.0 pF with pull-in voltage of 12 V. The significantly improvement of electrical properties is related to the reducing of residual stress in poly-Si membrane to near-zero level by using suitable annealing condition. | |
| dc.identifier.citation | Ieecon 2018 6th International Electrical Engineering Congress, 2018 | |
| dc.identifier.doi | 10.1109/IEECON.2018.8712180 | |
| dc.identifier.other | 2-s2.0-85066631619 | |
| dc.identifier.uri | https://dspace.kmitl.ac.th/handle/123456789/8681 | |
| dc.source | Ieecon 2018 6th International Electrical Engineering Congress | |
| dc.subject | Annealing | |
| dc.subject | C-V characteristics | |
| dc.subject | MEMS capacitive microphone | |
| dc.subject | Polysilicon membrane | |
| dc.subject | Pull-in voltage | |
| dc.subject | Residue stress | |
| dc.title | Effects of Annealing Process on the Electrical Properties of MEMS Capacitive Microphone | |
| dc.type | Conference Paper |
