Design high speed and low power hybrid full adder circuit

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dc.contributor.authorSathaporn Lueangsongchai
dc.contributor.authorSiraphop Tooprakai
dc.date.accessioned2025-07-21T06:00:27Z
dc.date.issued2018-09-01
dc.identifier.doi10.1109/iscit.2018.8587979
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/7718
dc.subjectXNOR gate
dc.subjectTransmission gate
dc.subjectLow-power electronics
dc.subjectXOR gate
dc.subjectGate equivalent
dc.subjectSerial binary adder
dc.subject.classificationAnalog and Mixed-Signal Circuit Design
dc.titleDesign high speed and low power hybrid full adder circuit
dc.typeArticle

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