Optimal Number of Wires for Circuits on RTLDesigned FPGAs

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dc.contributor.authorTomoaki Sato
dc.contributor.authorYuya Hayashihara
dc.contributor.authorShione Yokota
dc.contributor.authorSorawat Chivapreecha
dc.contributor.authorPhichet Moungnoul
dc.date.accessioned2025-07-21T06:10:57Z
dc.date.issued2024-03-06
dc.identifier.doi10.1109/ieecon60677.2024.10537940
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/13382
dc.subjectApplication-specific integrated circuit
dc.subjectReconfigurable Computing
dc.subject.classificationEmbedded Systems Design Techniques
dc.titleOptimal Number of Wires for Circuits on RTLDesigned FPGAs
dc.typeArticle

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