A Logarithmic Level-Crossing ADC with Fixed Comparison Window
| dc.contributor.author | Silar Sirimasakul | |
| dc.contributor.author | Apinunt Thanachayanont | |
| dc.date.accessioned | 2025-07-21T06:07:05Z | |
| dc.date.issued | 2022-05-24 | |
| dc.identifier.doi | 10.1109/ecti-con54298.2022.9795458 | |
| dc.identifier.uri | https://dspace.kmitl.ac.th/handle/123456789/11326 | |
| dc.subject | Realization (probability) | |
| dc.subject | Charge sharing | |
| dc.subject | Analog-to-digital converter | |
| dc.subject.classification | Analog and Mixed-Signal Circuit Design | |
| dc.title | A Logarithmic Level-Crossing ADC with Fixed Comparison Window | |
| dc.type | Article |