0.75-V four-quadrant current multiplier using floating gate-MOS transistors

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dc.contributor.authorMontree Kumngern
dc.contributor.authorJirasak Chanwutitum
dc.date.accessioned2025-07-21T05:54:39Z
dc.date.issued2014-03-01
dc.identifier.doi10.1109/ieecon.2014.6925870
dc.identifier.urihttps://dspace.kmitl.ac.th/handle/123456789/4423
dc.subjectLinearity
dc.subjectVoltage multiplier
dc.subject.classificationAnalog and Mixed-Signal Circuit Design
dc.title0.75-V four-quadrant current multiplier using floating gate-MOS transistors
dc.typeArticle

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