A CMOS current-mode multiplier/divider using a current amplifier
| dc.contributor.author | Kumngern, Montree | |
| dc.contributor.author | Torteanchai, Usa | |
| dc.date.accessioned | 2026-08-06T10:07:04Z | |
| dc.date.available | 2026-08-06T10:07:04Z | |
| dc.date.issued | 2013-08-28 | |
| dc.description.abstract | This paper presents a new realization of current-mode two-quadrant analogue multiplier/divider using only a single current amplifier. CMOS technology is used to realize the proposed circuit. Therefore, it can be implemented by low cost technology. The proposed circuit provides following advantages: low circuit complexity, very suitable for integrated circuit implementation, good temperature stability. PSPICE simulation results using the 0.5 μm CMOS technology from MIETEC are included to confirm the workability of the presented theory. © 2013 IEEE. | |
| dc.identifier.citation | Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference Peoco 2013, 742-745, 2013 | |
| dc.identifier.doi | 10.1109/PEOCO.2013.6564645 | |
| dc.identifier.other | 2-s2.0-84882801605 | |
| dc.identifier.uri | https://dspace.kmitl.ac.th/handle/123456789/4984 | |
| dc.source | Proceedings of the 2013 IEEE 7th International Power Engineering and Optimization Conference Peoco 2013 | |
| dc.subject | analog circuit | |
| dc.subject | analogue multiplier/divider | |
| dc.subject | current-mode circuit | |
| dc.subject | nonlinear circuit | |
| dc.title | A CMOS current-mode multiplier/divider using a current amplifier | |
| dc.type | Conference Paper |
