Low-voltage NMOS-based current differencing buffered amplifier and its application to current-mode ladder filter design
| dc.contributor.author | Tangsrirat, W. | |
| dc.contributor.author | Klahan, K. | |
| dc.contributor.author | Dumawipata, T. | |
| dc.contributor.author | Surakampontorn, W. | |
| dc.date.accessioned | 2026-08-06T09:54:20Z | |
| dc.date.available | 2026-08-06T09:54:20Z | |
| dc.date.issued | 2006-11-01 | |
| dc.description.abstract | An integratable circuit technique to realize a low-voltage current differencing buffered amplifier (CDBA) is introduced. The realization scheme is through the modification of a low-input resistance CCII+ and the proposed CDBA can operate with the minimum supply voltage of ±1.25∈V. In order that the signal path consists of only NMOS transistors, a negative current mirror using NMOS transistors is employed. With standard 0.5∈μm CMOS process parameters, PSPICE simulation results show that the proposed CDBA provides the terminal resistance of , , and the -3∈dB bandwidth of about 500∈MHz. Application examples employing the proposed CDBA as active elements in the leapfrog simulation of current-mode ladder filters are also included. | |
| dc.identifier.citation | International Journal of Electronics, 93(11), 777-791, 2006 | |
| dc.identifier.doi | 10.1080/00207210600711556 | |
| dc.identifier.issn | 00207217 | |
| dc.identifier.other | 2-s2.0-33750062858 | |
| dc.identifier.uri | https://dspace.kmitl.ac.th/handle/123456789/1349 | |
| dc.source | International Journal of Electronics | |
| dc.subject | Current differencing buffered amplifier | |
| dc.subject | Current mode circuit | |
| dc.subject | Ladder filter | |
| dc.subject | NMOS transistor | |
| dc.title | Low-voltage NMOS-based current differencing buffered amplifier and its application to current-mode ladder filter design | |
| dc.type | Article |
